Micro and Smart Systems Lecture - 36 Signal conditioning Circuits and Integration of microsystems and microelectronics Prof K.N.Bhat, ECE Department , IISc Bangalore email: [email protected] 1 Topics for Discussion • Signal conditioning Circuits • Integration of Microsystems and Microelectronics 2 Signal conditioning Circuits • Instrumentation Amplifier. (Discussed in Lecture No.33 ) • Analog to Digital Converters (Discussed in Lecture No.33) • Wheatstone Bridge • Switched Capacitor Circuits • Phase locked Loop and Circuit to Sense Frequency Shift 3 Wheatstone Bridge • Widely used for improving signals in piezoresistive pressure sensors and accelerometers Resistors ‘R’ are located on membranes or beams such that the one pair of Opposite arms of the bridge increase from R to (R+R) and decrease from R to (R-R) on the other pair while sensing the stress R- R Vin R + R R +R  Vo  R-R R  R R  R Vo  Vin (  ) 2R 2R R  Vin R Even a 0.1 % change R gives Vo =1mV for Vin=1V 4 Piezoresistive pressure sensor Pressure P Diaphragm R+R R- R R+R R- R R1  R2  R3  R4  R Piezo resistors : p-type boron diffused/ implanted R Vo  Vin R  V o Sensitivity S  P 5 Switched Capacitor Circuit- capacitor sensing T2 V1 C1 T1 VS  V2 C2  T4 T3 VS T1 T4 C1 V1  Vth , V2  0 T2   T3 N-Channel MOSFET is used as a switch which closes the path between S and D when gate voltage VG >Vth is Vo applied. VG S D S D Vo T1 ,T2 and T3 are closed switches and T4 is open. Capacitor C1 gets charged to VS . Charge across C1 is Q = C1VS 6 V1  0, V2  Vth T2 V1 C1 T1 VS  V2 C2  T4 T1 ,T2 and T3 are open switches and T4 is closed. Vo T3 T2 C1 T1 VS   T4 T3 C2 The Charge Q =C1VS across C1 discharges through T4 and the output voltage rises to V0 charging C2 so that Q  C2 Vo  C1VS Vo 7 Voltages and Charges at different instants V1 C1 T1 VS Q  C1VS T2   T4 Vo T3 V2 C1 T1 VS Q  C2 Vo  C1VS  C2  T4 Vo T3  C2  C1 (VS / Vo ) 8 Phase locked Loop (PLL) Vin fin DC Amplifier Low Pass Filter Phase Detector fo Vf Voltage Controlled Oscillator Vo Vo • The phase detector in PLL compares the phase of Vin (frequency fin) with that Vf (frequency fo). • LPF removes all high frequency components . • The DC voltage is amplified and fed to a VCO whose output frequency fo is proportional to Vo . • If fin shifts slightly, the phase difference between fin and fo begins to increase. This changes the control voltage Vo to the VCO in such a way as to bring the VCO frequency to 9 the same value as fin PLL has three modes of Operation: 1. Free running mode. There is no Vin and VCO runs at fixed “Center frequency” fo . 2. Capture Mode. Requires a Vin frequency fin . The VCO frequency changes continuously till it matches with fin. 3. Phase lock Mode. The PLL is in phase lock mode when VCO frequency = fin. The feedback loop maintains the lock when the frequency of Vin changes. 10 Frequency Bands of PLL Operation 1. Capture Range fc is the range of fin centered around fo over which output signal frequency Vf of VCO can acquire lock with fin from an unlocked condition 2. Lock range fL : Once the PLL has achieved ‘Capture’, it can maintain lock with Vin ,signal over a somewhat wider frequency range (centered around fo ) . This is called the “lock range” fL. Applications Of PLL: Used in Basic building blocks of electronics circuits . In microsystems the PLL is used to measure the frequency shift which can be used to 11 monitor the change in force or acceleration Integration of Microsystems and Microelectronics Integration approaches • Fabricate the microsystem and microelectronics in two different Chips and package in a single package • Fabricate monolithically on a single chip with a Modular approach – Microcircuits are fabricated first in IC foundry and handed over to Micromachining foundry to do the sensor /actuator part withot bothering about the circuitry • Fabricate Micro-sensors in the IC foundry along with the IC Processing front side process 12 first and backside process last Cross sectional view of CMOS and microstructure fabricated with Modular approach (Berkley Process) Ref: Weijie Yun, R.T.Howe and P.R. Gray, “Surface Micromachined , Digitally Force-Balanced Accelerometer with Integrated CMOS Detection 13 Circuitry”, IEEE pp.126-132, 1992 Other Approaches for Integration • CMOS first and the Microsystems next requires high temperature processing (LPCVD Polysilicon deposition) during the Microsystems fabrication. Therefore, refractory metals and protective Nitride layers should be used before transferring the wafer for Micromachining • Alternately, one can fabricate Microsystems first and the electronics portion next . In this approach it is difficult to retain the microstructure during the subsequent processes • It has been demonstrated that if bulk micromachining is used as the last step, integration is easier and is discussed next 14 Micro sensor and Electronics circuit fabricated in the IC Foundry on the same wafer Front side Process first (cross sections) Oxide N+ diffusion MOSFET circuit N+ (100) p-Silicon substrate MOSFET circuit , followed by opening oxide and N+ diffusion for the sensor portion Al-1% Si Polysilicon PSG (100) p-Silicon substrate PSG (ie. P2O5.SiO2) deposition, Trench etch , Polysilicon deposition and patterning . Al-1% Si metallization for source drain contact and 15 patterning Integrated air-gap-Capacitive Pressure sensor Backside process next (Cross sections) Al-1% Si Polysilicon PSG (100) p-Si One - sided anisotropic KOH etch: 80C, 6 hrs , 60C 2 hrs Polysilicon Diaphragm (100m x100m ) 0.7m 500m (100) p-Si NMOS FET 50m Pressure inlet N+ bottom capacitor plate 750m Reported in literature: Pressures upto 10psi were measured . An output voltage of 2 to 2.5 Volts was measured due to the capacitance change 16 Backside etching Pattern in the mask layout 17