LIST OF SYMBOLS & ABBREVIATIONS IC VLSI SCT SCI D/A A/D LV LP ULSI MOS/MOSFET NMOS/N-MOS CMOS VM CM OPAMP CMRR BW I-V Vout V in A β β β α R r Ao s ω I A(s) K CFOA CC CCII VCVS Integrated Circuit Very Large Scale Integration Semi Conductor Technology Semi Conductor Industry Digital to Analog Converter Analog to Digital converter Low Voltage Low Power Ultra Large Scale Integration Metal Oxide Semiconductor Field Effect Transistor N type Enhancement MOS Complementary MOS, Complementary MOS Inverter Voltage Mode Current Mode Operational Amplifier Common Mode Rejection Ratio Band Width Current versus Voltage Output Voltage signal Input Voltage signal Open Loop Voltage Gain of the OPAMP Feedback Factor, Gain of the feedback circuit (CH.1 only) Device Conductance of MOS Current Gain, in case of CC/CCCII, Gain of current conveyance Voltage Gain Coefficient (CC/CCCII) Constant of proportionality (Eq.3.2) Resistance/ Resistor Resistance, usually MOS Channel resistance Open Loop DC Gain of the OPAMP Laplace variable Radian Frequency Current , signal current Gain of Amplifier in s Laplace Domain (Eq.1.6) Current Gain of the Current Amplifier (Eq.1.7) Current Feedback Operational Ammplifier Current Conveyor 2nd Generation Current Conveyor Voltage Controlled Voltage Source xxi VCCS CCVS CCCS OTA GBW OFC CCCII Z Zi, Zo ∞ GAXAsY SOI BJT nm µm (µ: scale) CNT CNTFET FET FinFET VDD VSS VTH VTP, VTN VT VGS § SC ± C CS CG ∆ dt S VioDD = ro 2 −1 g λ po zo µ W L >>,( <<) ≤ (≥) Voltage Controlled Current Source Current Controlled Voltage Source Current Controlled Current Source Operational Transconductance Amplifier Gain Bandwidth Operational Floating Conveyor 2nd Generation Current Controlled Current Conveyor Impedance with suffix i = input o = output x = at node x etc… Impedance at Input or Output node Infinity, A comparatively very large Physical Entity Gallium Arsenide, X & Y stand for molecular number Silicon On Insulator Bipolar Junction Transistor Nanometer Micrometer Carbon Nano Tube Carbon Nano Tube based FET Field Effect Transistor Multiple Gate FET Biasing Supply in CMOS Circuits, name by convention Negative Biasing Voltage, Bias at the Source of a MOS Threshold Voltage of a MOS, Channel Inversion Voltage Threshold Voltage of PMOS and NMOS Thermal equivalent voltage Gate – Source Drive of a MOS Article Number Switched Capacitor (§1.6.2) Positive or Negative Capacitance Common Source (Amplifier) Common Gate (Amplifier) Increment step size of a variable Time increment, a term used in time dependant differentiation and integration Sensitivity of variable V wrt parameter I Conductance, transconductance of a MOS Channel Length Modulation coefficient Pole frequency (Eq.2.5) of Transfer Function Zero frequency (Eq.2.6) of Transfer Function Carrier Mobility of MOS Channel Channel Width of a MOS Channel Length of a MOS A quantity comparatively very large (small) Less than (Greater than) xxii VDsat HD m f f(*) IQ IQL, IQU γ γ ≈ W Sq cm 1X, 2X… LdI/dt k T q fT E h τ co xj tox ε εox, εSi td, td_min CINT CoINV p.u. RINT ν, νSi Zo η Cg Cb S ln Nbulk wd ϕ GIDL ITRS MEMS SOC SIA TFLOP D – S Voltage of MOS when in saturation Harmonic Distortion Coefficient, Suffix 1, 2, 3 are its order Modulation index of channel length (Eq.2.10) Frequency variable, constant A function of ; Quiscent Current Upper and Lower quiescent current Body effect Coefficient of a MOS Scaling coefficient (Eq.2.16) Approximately equal or almost same as: Watts, a unit of power Square centimeter Number of times (2X = double) Rate of change of Current Boltzman Constant Absolute Temperature One Unit Charge Unity Gain Bandwidth of amplifiers, MOS Energy, energy associated with a function Plank’s Constant Transit Time in a SC feature Speed of light in free space Junction depth Gate oxide thickness Permittivity constant Permitivity of Silicon Di Oxide or Silicon Switching time, Minimum switching time Interconnect Capacitance Inverter output capacitance Per unit Interconnect Resistance Speed, Speed of light in Silicon Characteristic Impedance Subthreshold slope factor Gate capacitance Body capacitance Subthreshold swing, =1/η Logarithm at natural base “e” Dopant concentration in the Silicon bulk Depletion width Fermi potential Gate Induced Drain Lowering International Technology Road Map for Semiconductors Micro-electro-mechanical systems Silicon on sapphire Semiconductor Industry Association Terra floating point operation xxiii QSERL P Pstatic Pdynamic Pshort_ckt Pleak p0→1 tsc Ipeak I SUB I GATE I GIDL I REV Quasi Static Energy Recovery Logic Power Static Power, power associated to a circuit when it is idle Dynamic Power, power associated to a circuit under it’s activity Power associated to a circuit when MOSs (N & PMOS) connect VDD to VSS briefly Leakage power, power associated to condition when it must be ideally zero. Activity index of a digital circuit, probability of a having a 0→1transition Time period during which VDD remains shorted with VSS Peak value of current Subthreshold current leakage Gate leakage current Leakage due to GIDL Reverse bias junction leaksge θ ja Junction to Ambient thermal resistance TCHIP T AMBIENT PCHIP On-die junction temperature Temperature of the surrounding of the junction Maximum IC power consumption A constant of planar and solid angle, An upward/downward trend of the variable under consideration Negative Bias Temperature Instability Product of the Gain and the Transition Frequency Right Hand Side Left Hand Side List of SPICE commands/statements describing circuit Parasitic Capacitance model used by HSPICE Berkeley Short-channel IGFET Model 4th major version of BSIM, capable of handling advanced MOSFETs Levels of analysis supported by the HSPICE. Advanced models usually treated at higher levels, Simulation Program with Integrated Circuit Emphasis Advanced version of SPICE for Industry Standard, A GOLD Standard SPICE, suitable upto 100GHz A capacitance model card of HSPICE Drain induced barrier lowering Are calculation method Drain and source regions of the MOSFET Diffusion resistance (used by HSPICE for leakage estimation) Diffusion capacitance, (used by HSPICE for leakage estimation) Leakage to substrate Device parameter cards of HSPICE Gate-to-Source Current Gate-to-Drain Current Gate-to-Substrate Current (Igb = Igbacc + Igbinv) π ↑↓ NBTI GFT RHS LHS netlist CAPOP BSIM BSIM4 LEVEL SPICE HSPICE CAPMOD DIBL ACM D/S, D–S, d–s Ddiff Cdiff Isub LX - - igso igdo igbo xxiv igcso igcdo iimi igidlo igdt Igc igbacc igbinv IGISLO COVLGS COVLGB CDO CBSO CBDO QB CQB QG CQG QD CQD CGGBO CGDBO CGSBO CBGBO CBDBO CBSBO QBD QBS CAP_BS CAP_BD CQS CDGBO CDDBO CDSBO cap_bsz cap_bdz CGGBM CGDBM CGSBM CDDBM CDSBM Source Partition of Igc Drain Partition of Igc Impact ionization current Gate-induced drain leakage current Gate Dielectric Tunneling Current (Ig = Igs + Igd + Igcs + Igcd + Igb) Gate-to-Channel Current at zero Vds Determined by ECB (Electron tunneling from the Conduction Band); significant in the accumulation Determined by EVB (Electron tunneling from the Valence Band); significant in the inversion Gate-induced source leakage current Gat e-source overlap and fringing capacitances Gate-bulk overlap capacitances Channel current (IDS) DC source-bulk diode current (CBSO) DC drain-bulk diode current (CBDO) Total bulk (body) charge (QB)—Meyer and Charge Conservation Bulk (body) charge current (CQB)—Meyer and Charge Conservation Total Gate charge (QG)—Meyer and Charge Conservation Gate charge current (CQG)—Meyer and Charge Conservation Channel charge (QD)—Meyer and Charge Conservation Channel charge current (CQD)—Meyer and Charge Conservation Intrinsic gate capacitance Intrinsic gate-to-drain capacitance Intrinsic gate-to-source capacitance Intrinsic bulk-to-gate capacitance Intrinsic bulk-to-drain capacitance Intrinsic bulk-to-source capacitance Drain-bulk charge (QBD) Source-bulk charge (QBS) Bias dependent bulk-source capacitance Bias dependent bulk-drain capacitance Channel-charge current (CQS). Intrinsic drain-to-gate capacitance Intrinsic drain capacitance CDSBO = -dQd/dVs, Drain-to-source capacitance - Meyer and Charge Conservation Zero voltage bias bulk-source capacitance Zero voltage bias bulk-drain capacitance Total gate capacitance (including intrinsic), and all overlap and fringing components Total gate-to-drain capacitance (including intrinsic), and overlap and fringing components Total gate-to-source capacitance (including intrinsic), and overlap and fringing components Total drain capacitance (including intrinsic), overlap and fringing components, and junction capacitance Total drain-to-source capacitance xxv CDGBM CBGBM CBDBM cdtot cgtot cstot cbtot cgs cgd Unit (Area) Total drain-to-gate capacitance (including intrinsic), and overlap and fringing components Total bulk-to-gate (floating body-to-gate) capacitance, including intrinsic and overlap components Total bulk-to-drain capacitance (including intrinsic), and junction capacitance Total capacitance associated with drain Total capacitance associated with gate Total capacitance associated with source Total capacitance associated with body or substrate Total capacitance associated with gate and source Total capacitance associated with gate and drain 1unit=45nmx45nm; WxL/(45nmx45nm)=Device Area in units xxvi
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