RedHawk™-CPA Chip-Package Co-analysis Design Automation Conference 2014 6/23/2014 © 2014 ANSYS, Inc. 1 Design Trends and Challenges Supply vs FOM Delay Operating voltage Threshold voltage Source: ARM FinFET Study 2013 • • Lower operating voltage Tighter operating margins ITRS Trends, 2012 Demand Current Supply Current High power Low power 6/23/2014 The Move to FinFET Nodes: Increased Chip Functionality: • • • © 2014 ANSYS, Inc. Increasing number of voltage domains Power density variations Increasing operating modes 2 Need for Accurate Package Models Package Model for Noise Analysis: Green = Current from battery w/o pkg Red = Current from battery w/ pkg • Model inductive components • Model di/dt events accurately • Model high and low frequency effects Die Package V(t) + - 6/23/2014 Supply Lpkg Rpkg i(t,V) Rdie Cpkg Cdie © 2014 ANSYS, Inc. 3 Full CPS Analysis 32nm CMOS Design Transient Analysis Package Modeling Importance Without Package With Package • Analysis with and without package shown • Package has significant impact on chip voltage 6/23/2014 © 2014 ANSYS, Inc. 4 RedHawk-CPA Chip-Package Co-Analysis Platform Package modeling for on-die analysis 6/23/2014 • Accurate per-bump package model for IC analysis • Tight integration with RedHawk platform • Enables package voltage drop analysis © 2014 ANSYS, Inc. 5 RedHawk-CPA Overview • Package Model Generation Customized for RedHawk – High bump resolution – Model power/ground supplies independently – Fast and accurate – Automatic hook-up and import into RedHawk – Direct import of package layout • IC-Package Co-Analysis – Support for IR, DvD and power-up analysis in RedHawk – DC-IR Static analysis of package – AC-hotspot analysis of package 6/23/2014 © 2014 ANSYS, Inc. 6 RedHawk-CPA Accuracy • Extraction engine uses 3D full-wave technology • Optimized for IC-Package co-simulation • Per-bump resolution • Correlated with reference electromagnetic solvers Proprietary meshing technology 6/23/2014 Correlation with 3D solvers © 2014 ANSYS, Inc. 7 Physical vs S-Parameter Models RedHawk-CPA (RLCK Model) • • • • Thousands of bumps can be modeled Separate power and ground networks Accurate for PDN frequency components Physical model S-Parameter (3D-FW Model) • • • • Limited to tens of ports Folded ground/power networks Appropriate for signal integrity analysis Behavioral model Die Analysis 6/23/2014 Package SI/PI Analysis © 2014 ANSYS, Inc. 8 Power and Ground Noise Modeling Power and Ground Model Requirement Board Package Chip CPA Model RedHawk planes other components capacitors DvD Analysis Requirements VDD Drop VSS Drop – Power and ground networks to be analyzed – Ground bounce through package impacts ground bounce on die – Net based and instance based drops 6/23/2014 © 2014 ANSYS, Inc. 9 RedHawk-CPA Analysis Flow: Model Import Pkg Database 3D FEM PKG Extraction IC Database Chip Package RedHawk Co-simulation Die-Package Hook Up using GUI: IR, DvD, Power-up Package Bumps – Automatic connection using PLOC – PKG-DIE transformations done – One click die hook up 6/23/2014 RedHawk PLOC © 2014 ANSYS, Inc. 10 RedHawk-CPA Performance Setup Runtime #Terminals 6 layer package / 3 domains 10min (~15GB) 600 18 layer package / 6 domains 15hrs:20min (~100GB) ~3000 Enabling Technologies – – 6/23/2014 Multi-core solver Adaptive meshing © 2014 ANSYS, Inc. 11 RedHawk-CPA Analysis Flow: Co-simulation Pkg Database 3D FEM PKG Extraction IC Database Chip Package RedHawk Co-simulation Package Robustness Metrics Chip-Aware Package AC/DC Hotspot RedHawk Explorer Results Package/Die Co-visualization 6/23/2014 Package-Aware IR/DvD © 2014 ANSYS, Inc. 12 Package Robustness Metrics Bump/Pin RL – Highlight bumps with relatively large resistance or inductance – Overlay results with package layout to find routing weak points Impedance Analysis – Per bump impedance – Impedance vs frequency analysis 6/23/2014 © 2014 ANSYS, Inc. 13 Chip-Aware Package DC and AC Hotspot DC-Hotspot – IR drop across package planes – View voltage, currents – View individual layers including bumps/balls AC-Hotspot – AC voltage/current as function of frequency – Automatic or user driven frequency points – EMI near/far field views 6/23/2014 © 2014 ANSYS, Inc. 14 Case Study: Per-Bump Accuracy Bump Voltage from RedHawk DvD Analysis Lumped Per-bump Model Per-bump CPA model shows voltage variations on bumps 13.8mV (Uniform) 19.2mV Instance Voltage Distribution Veff No PKG Veff Lumped PKG Veff Distributed PKG Instance voltage distribution shows larger variations using the distributed per-bump model RedHawk-CPA highlighted weakly connected bumps !! 6/23/2014 © 2014 ANSYS, Inc. 15 Case Study: RedHawk-CPA – Not all cores were able to meet specified speed Silicon Measurements – Silicon measurement showed voltage gradient across cores to be the cause Cores 0/1 faster than cores 2/3 – Simulations with RedHawk-CPA high resolution package model correlated with measurement • 61mV simulated vs. 50mV measured voltage difference (core3 – core1) Core 1 Core 3 RedHawk-CPA Results Core 0 Core 2 Source: Mahesh Sharma et al., “Unified method for package-induced power supply droop”. Design Automation Conference 2013, Designer Track 6/23/2014 © 2014 ANSYS, Inc. 16 Summary Enabling IC/Package Co-analysis Using RedHawk-CPA IC Database Pkg Database RedHawk-CPA 3D FEM Package Extraction IR, DvD, Power-up Streamlined Package/Die Setup IC-Package Co-Analysis Package Pin Inductance/R Maps Accurate Voltage Gradient Across Bumps Independent Power/Ground Analysis with Package 6/23/2014 HTML Report of Analysis © 2014 ANSYS, Inc. 17
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