DLD ASSIGNMENT –I(ii)

DE ASSIGNMENT –I(ii)
UNIT-1
1
Explain signed binary number representation.
2
Given the 8-bit data word 01011011, generate the 13-bit composite word for the
hamming code that corrects single errors and detects double errors
3
Express the following Boolean function in sum of min terms and product of
maxterms
[2011-12]
F(X,Y,Z) = (XY + Z)(Y + XZ)
4
Simplify the Boolean function F in (i) SOP
F(X,Y,Z) = ∑(2,3,6,7)
5
Simplify the Boolean function F together with don’t-care condition using Karnaugh
map
F(w,x,y,z) = ∑(1,3,4,13,15)
D(w,x,y,z) = ∑ (2,5,6,7)
6
Simplify the following expression and implement it with two level NAND gate circuit
G = A’B’D + A’CD + A’BC
d = A’BC’D + ACD + AB’D’
7
Minimise the following Boolean function by using Quine Mc-Clusky Method
(i) F(A,B,C,D,E) = ∑(0,2,4,10,15,19,23,29,31)
[2009-10]
(ii)F(A,B,C,D,E,F) = ∑ (20,28,37,39,48,56)
8
Implement using NOR gates only
(i) 2 input XOR gate
9
(ii) POS form
[2010-11]
(ii) Y = (A + B’)(B’ + C)(A + C)
Represent (213.25)10 in single precision floating point representation
[2009-10]
DE ASSIGNMENT I[i]
UNIT-I
1 Convert the following numbers as indicated
(i) (1001.1)8 = ( )2
(ii) (345)8 = ( )10
(iii) (7841)9 = ( )7
(iv) (11101.01)2 = ( )5
(v) (110101101..11)2 = ( )8 = ( )H
(vi) (225.225)10 = ( )2 = ( ) 8 = ( )H
2.Obtain 1’s & 2’s complements of the following binary numbers
(a) 10000000
(b) 00000000
(c) 01110110
(d) 11111111
3. Find the 9’s & 10’s complements of the following decimal numbers
(a) 12,345,678
(b) 25,000,000
(c) 63,325.600
(d) 00,000,000
4. Perform the given operation on unsigned binary numbers. Use 2’s complement for
subtraction. Verify your answers.
(a) 10111 - 10001
(b) 100010 - 100011
© 1001 - 101000
(d) 1100.00 - 1010.1
(e) 10111 + 1011.01
5 Do the above question using 1’s complement
6. Perform the given operation on unsigned decimal numbers. Use 10’s complement for
subtraction. Verify your answers (a) 6,428 – 3,409
(b) 125 – 1,800
© 2,043 – 6,152
(d) 1,631 – 745
7. Perform following arithmetic operation in binary using signed 2’s complement
representation
(+29) + (-46), (-29) + (+46), (-29) + (-46) and (-29) - (-46).
Convert the answers back to dec and verify that they are correct. [2011-12]
8. Perform the arithmetic operation using signed 1’s complement method
[2009-10]
(i) Add (-19)10 and (29)10
(ii) Add (21)10 and (37)10
(iii) question 6
9. Perform following arithmetic operation on decimal numbers using signed 10’s
complement representation
(a) (+9,286) + (+801)
(b) (+9,286) + (-801)
© (-9,286) + (+801)
(d) (-9,286) + (-801)
10. Convert dec no 8723 to both BCD and ASCII codes. For ASCII an even parity bit is to
be appended at the left
11. Represent unsigned dec numbers 842 and 535 in BCD and then show the steps necessary
to form their sum.[2010-11]
12. Formulate a weighted binary code for the dec digits , using weights
6,3,1,1
13. Represent dec number 5137 in (a) BCD, (b) excess-3 code, (c) 2421 code, and (d) a 6311
code
14. How many printing characters are their in ASCII. How many of them are special
characters. What bit must be complimented to change an ASCII letter from capital to
lower case and vice versa.
15. The state of a 12 bit register is 100010010111. What is its content if it represents
(a) 3 dec digits in BCD
(b) 3 dec digit in excess-3 code
(c) 3 dec digits in 8 4-2-1 code.
16 How many bits of memory are required for storing 100 names of a group of people,
assuming that no name occupies more than 20 characters(including space) ? Assume 7-bit
ASCII code with parity bit.
17 Encode the decimal number 46 to gray code.
Digital Electronics
ASSIGNMENT – 2
UNIT-II
1
Draw and explain function of half adder and full adder with suitable diagram. Implement a
full adder using two half adders and an OR gate
2
Draw and write expression for a 4 bit parallel subtractor using full adder
3
Briefly describe (draw & explain) the following
(i) Decimal Adder
(ii) Encoder (octal to binary encoder)
(iii) Binary Multiplier
(iv) Multiplexer
(v) 2 to 4 line decoder
(vi) Demultiplexer(One line to 8 line)
4
Draw and explain function of half subtractor and full subtractor with suitable diagram.
Implement a full subtractor using two half subtractor and an OR gate
5
Design a combinational circuit that compares the magnitude of two 4 bit numbers and its
output indicates whether A>B,A=B or A<B.
6
What is priority Encoder? Explain with the help of suitable example
7
Design an excess-3 to BCD code converter
DE ASSIGNMENT
UNIT 4 & 5
Unit 4
1.
2.
3.
4.
5.
Design a combinational circuit using a ROM that accepts a 3 bit number and
generates an output binary number equal to the square of the input number.
Implement the following functions using 3-input, 3 product terms and 2 output PLA :
F1 = AB’ + AC
F2 = AC + BC
It is required to obtain a memory system of 2K x 8 bits for a certain application.
Given that memory ICs available are 1K x 8. Obtain the desired system.
What is ASM chart ? Describe the design with multiplexer.
6.
Explain the basic elements of the ASM CHART. How does it differ from
conventional flow chart
7.
Distinguish between SRAM and DRAM. Also draw static RAM cell.
8.
Write short note on
(i) Comparison between PROM, PLA, and PAL
(ii) Structure of 4-byte diode ROM
UNIT 5
9
Derive the transition table and output map for the asynchronous sequential circuit
described by following function :
i. Y = x1x2’ + (x1 + x2’)y
ii. Z = y
Also describe in words the behaviour of the circuit
10
Explain the hazards in combinational and sequential circuit. Also explain the remedy
for eliminating a hazard. What are critical race and non critical race ?
11
Draw and explain the block diagram of asynchronous sequential circuit and explain
its working. List the different techniques used for state assignments.. Also write the
steps for analysis of asynchronous sequential circuit

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