Logical and shift operations

ARM Cortex-M4 Programming Model
Logical and Shift Instructions
References:
Textbook Chapter 3, Section 3.3.4, 3.3.5
Chapter 4, Section 4.2.2
“ARM Cortex-M Users Manual”, Chapter 3
1
CPU instruction types
 Data movement operations
 memory-to-register and register-to-memory
 includes different memory “addressing” options
 “memory” includes peripheral function registers
 register-to-register
 constant-to-register (or to memory in some CPUs)
 Arithmetic operations
 add/subtract/multiply/divide
 multi-precision operations (more than 32 bits)
 Logical operations
 and/or/exclusive-or/complement (between operand bits)
 shift/rotate
 bit test/set/reset
 Flow control operations
 branch to a location (conditionally or unconditionally)
 branch to a subroutine/function
 return from a subroutine/function
2
ARM Logic Operations
A
Rn
B
Operand
2
A&B
AND
A|B
ORR
A^B
EOR
A&(~B)
BIC
A|(~B)
ORN
0
0
0
0
0
0
1
0
1
0
1
1
0
0
1
0
0
1
1
1
1
1
1
1
1
0
0
1
 Bit-Wise Logic Instructions
AND{S}
ORR{S}
EOR{S}
BIC{S}
ORN{S}
{Rd,}
{Rd,}
{Rd,}
{Rd,}
{Rd,}
Rn,
Rn,
Rn,
Rn,
Rn,
<op2>
<op2>
<op2>
<op2>
<op2>
;
;
;
;
;
Rd=Rn
Rd=Rn
Rd=Rn
Rd=Rn
Rd=Rn
&
|
^
&
|
op2
op2
op2
(~op2)
(~op2)
(bit clear)
Bard, Gerstlauer,
Valvano, Yerraballi
To set bits
Use the or operation to set selected bits of a register to 1.
( The other bits remain constant.)
Friendly software modifies just the bits that need to be.
GPIO_PORTD_DIR_R |= 0x03; // Set PD1,PD0 outputs
Assembly:
LDR
LDR
ORR
STR
R0,=GPIO_PORTD_DIR_R
R1,[R0]
; read previous value
R1,R1,#0x03 ; set bits 0 and 1
R1,[R0]
; update
c7 c6 c5 c4 c3 c2 c1 c0
0
0
0
0
0
0
1
1
c7 c6 c5 c4 c3 c2 1
1
value of R1
0x03 constant (“mask”)
result of the ORR
Bard, Gerstlauer, Valvano, Yerraballi
To clear bits
Use the and operation to clear selected bits of a register.
GPIO_PORTD_DIR_R &= 0xFC; // PD1,PD0 inputs
Assembly:
LDR
LDR
AND
STR
R0,=GPIO_PORTD_DIR_R
R1,[R0]
; read previous value
R1,R1,#0xFC ; clear bits 0 and 1
R1,[R0]
; update
c7 c6 c5 c4 c3 c2 c1 c0
1
1
1
1
1
1
0
0
c7 c6 c5 c4 c3 c2 0
0
value of R1
0xFC constant (“mask”)
result of the AND
Bard, Gerstlauer, Valvano, Yerraballi
To toggle
The exclusive or operation can also be used to toggle bits.
GPIO_PORTD_DATA_R ^= 0x80; /* toggle PD7 */
Assembly:
LDR
LDR
EOR
STR
R0,=GPIO_PORTD_DATA_R
R1,[R0]
; read port D
R1,R1,#0x80 ; toggle bit 7
R1,[R0]
; update
b7 b6 b5 b4 b3 b2 b1 b0
value of R1
1
0x80 constant
0
0
0
0
0
0
0
~b7 b6 b5 b4 b3 b2 b1 b0
Bard, Gerstlauer, Valvano, Yerraballi
result of the EOR
Switch Interfacing
Not
pressed
+3.3V
Pressed
10kΩ
Open
s
LM3S or
TM4C
Input port
+3.3V
t
LM3S or
TM4C
Input port
10kΩ
Closed
Negative logic
Positive logic
The and operation to extract, or mask, individual bits:
Pressed = GPIO_PORTA_DATA_R & 0x10;
//true if the PA6 switch pressed
Assembly:
LDR R0,=GPIO_PORTA_DATA_R
LDR R1,[R0]
; read port A
AND R1,R1,#0x10 ; clear all bits except bit 6
LDR R0,=Pressed ; update variable
STR R1,[R0]
; true iff switch pressed
a7 a6 a5 a4 a3 a2 a1 a0
0
0
1 0
a6 0
0
0
0
0
0
0
0
0
0
0
value of R1
0x40 constant
result of the AND
Note: If 8-bit result is zero, then we know a6 = 0
If the 8-bit result is non-zero, then a6 = 1
Bard, Gerstlauer, Valvano, Yerraballi
Shift Operations
31 30 29 28 27 26
Logical Shift Right
LSR
1
0
C
1<n<32
0
Arithmetic Shift Right
ASR
Logical Shift Left
LSL
1<n<32
0
0<n<31
Rotate Shift Right
ROR
1<n<32
Rotate Right Extended
RRX
n=1
Formats:
LSL Rd, Rm, #imm ; imm = # bit positions to shift (n)
LSL Rd, Rm, Rs
; Rs = # bit positions to shift (n)
Use the ASR instruction when manipulating signed numbers,
and use the LSR instruction when shifting unsigned numbers
Bard, Gerstlauer, Valvano, Yerraballi
Shift Example
High and Low are unsigned 4-bit components, which will be combined into a single
unsigned 8-bit Result.
Result = (High<<4)|Low;
Assembly:
LDR
LDR
LSL
LDR
LDR
ORR
LDR
STR
0
h3
0
h3
R0,=High
R1,[R0]
R1,R1,#4
R0,=Low
R2,[R0]
R1,R1,R2
R0,=Result
R1,[R0]
0 0
h2 h1
0 0
h2 h1
0
h0
0
h0
h3
0
l3
l3
h2
0
l2
l2
; read value of High
; shift into position
; read value of Low
; combine the two parts
; save the answer
h1
0
l1
l1
h0
0
l0
l0
value of High in R1
after last LSL
value of Low in R2
result of the ORR instruction
Bard, Gerstlauer, Valvano, Yerraballi
Example: C statements
 C: z = (a << 2) |
 Assembler:
LDR
LDR
LSL
LDR
LDR
AND
ORR
LDR
STR
10
r4,=a
r0,[r4]
r0,r0,#2
r4,=b
r1,[r4]
r1,r1,#15
r1,r0,r1
r4,=z
r1,[r4]
;
;
;
;
;
;
;
;
;
(b & 15);
get address for
get value of a
perform shift
get address for
get value of b
perform AND
perform OR
get address for
store value for
a
b
z
z

Download Report