Ossila Ltd Copyright © 2009 – 2014 enabling organic electronics Contents Overview Safety System Components Declaration of Conformity System Setup Software Installation Equipment Setup Getting Started MAX (Measurement & Automated Explorer) Front Panel Taking a Measurement Acquisition Process Carrier Mobility Measurement Accuracy List of Symbols and Acronyms Ossila FACT1 Troubleshooting Warranty information and contact details List of compatible components Appendices Ossila Ltd Copyright © 2009 – 2012 3 4 5 7 9 10 11 15 15 19 21 28 27 36 41 42 45 46 52 2 enabling organic electronics Overview The Ossila Fast Automated Characterisation and Test (FACT1) system is designed to make testing of organic field effect transistors as simple as possible when combined with Ossila's OFET substrate systems. Fabrication of devices can be as simple as spin-coating a material on a test-chip and inserting it into the system. Alongside this, automated test routines perform output and/or transfer sweeps and calculate the key parameters. Each substrate contains five individual OFETs with connections made by using gold-coated springloaded connectors. The automatic selection of a device uses a high performance switching network. At the core of the measurement system is a computer controlled NI PXI dual source-measure unit with maximum output of ±100 V and accuracy up to 10 pA. This combined high level of output voltage and accuracy makes for maximum experimental versatility and speed. Finally, a touch screen graphical user interface makes control and measurement as simple as possible. Ossila Ltd Copyright © 2009 – 2012 3 enabling organic electronics Safety Warning To avoid safety hazards obey the following: Do not leave devices with applied bias or current unattended as a power failure may result in board damage or device damage and potentially hazardous situations. Caution To avoid damaging devices or equipment obey the following: Avoid electrostatic discharge (ESD) as this may damage the device. To avoid damage, use static discharge and prevention equipment where necessary. Only use the device for the purposes intended (described in this document) Do not expose the device to any cleaning fluids or solvents. Ensure that the PXI system is kept away from the CPU to avoid overheating. Follow good practice when setting up the test system. Avoid placing mobile phones on top of the system as this can cause interference. Ossila Ltd Copyright © 2009 – 2012 4 enabling organic electronics System Components NI PXIe-1071 Chassis. NI PXIe-PCIe8361 (mounted in slot 1 of the Chassis) and NI PCIe-8361 card (mounted inside the computer case). Two NI PXI-4132 SMU. Ossila Measurement Box containing five probes and relative relays, NI USB-6501 OEM, and control electronics. CSL Speed A25231uH (Window®7 operative system) endowed with Core®i5 Intel microprocessors. Touch Screen monitor Keyboard Ossila Ltd Copyright © 2009 – 2012 5 enabling organic electronics Mouse Two flexible coaxial cables endowed with NI PXI-4132 Front Panel I/O Connector. Two USB® cables with Standard A and Standard B plugs on the opposite ends Also included Ossila Ltd Three Power Supply Leads (Cords) for the touch screen, computer and PXIe-1071 Chassis. Copyright © 2009 – 2012 6 enabling organic electronics EC Declaration of Conformity In line with directive 2004/108/EC of the European Parliament and of the Council and directive 2006/95/EC of the European Parliament and of the Council. -Manufacturer Name: Ossila Limited Manufacturer Address: Kroto Innovation Centre, North Campus, Broad Lane, Sheffield, S3 7HQ -Item: OFET testing rig for use with PXI system Model number: FACT1 Software release: FACT1.2 -Specifications of product under harmonised standards: 2004/108/EC EN 61326-1:2006 Electrical equipment for measurement, control and laboratory use – EMC requirements – Part 1: General requirements IEC 61326-1:2005 EN 61326-2-1:2006 Electrical equipment for measurement, control and laboratory use – EMC requirements – Part 2-1: Particular requirements – Test configurations, operational conditions and performance criteria for sensitive test and measurement equipment for EMC unprotected applications IEC 61326-2-1:2005 2006/95/EC EN 61010-1:2010 Safety requirements for electrical equipment for measurement, control, and laboratory use - Part 1: General requirements IEC 61010-1:2010 EN 61010-2-030:2010 Safety requirements for electrical equipment for measurement, control, and laboratory use - Part 2-030: Particular requirements for testing and measuring circuits IEC 61010-2-030:2010 EN 61140:2002 Protection against electric shock - Common aspects for installation and equipment IEC 61140:2001 Ossila Ltd Copyright © 2009 – 2012 7 enabling organic electronics EN 61187:1994 Electrical and electronic measuring equipment - Documentation IEC 61187:1993 (Modified) EN 61010-2-081:2002 Safety requirements for electrical equipment for measurement, control and laboratory use - Part 2-081: Particular requirements for automatic and semiautomatic laboratory equipment for analysis and other purposes IEC 61010-2-081:2001 Declaration: I hereby declare that the equipment named above has been designed to comply with the relevant sections of the above referenced specifications. The unit complies with all applicable Essential Requirements of the Directives. -Signed: Name: Dr James Kingsley Date: 23/11/2014 Ossila Ltd Copyright © 2009 – 2012 8 enabling organic electronics System Setup Ossila FACT1 is easy and straightforward to set up. Only a few cable connections are required to make the system fully operational. Nonetheless, the User must read carefully the following instructions in order to safely and efficiently exploit the performance and accuracy of Ossila FACT1. Ossila FACT1 is an integrated measurement system composed of the following parts: Ossila Measurement Box containing five probes and relative relays, NI USB-6501 OEM, and control electronics. NI PXIe-1071 Chassis. NI PXIe-PCIe8361 (mounted in slot 1 of the Chassis) and NI PCIe-8361 card (mounted inside the computer case). Two NI PXI-4132 SMU. Touch Screen monitor CSL Speed A25231uH desk computer (Window®7 operative system) endowed with Core®i5 Intel microprocessors. Two flexible coaxial cables endowed with NI PXI-4132 Front Panel I/O Connector. Two USB® cables with Standard A and Standard B plugs on the opposite ends. Three Power Supply Leads (Cords) for the touch screen, computer and PXIe-1071 Chassis. Before starting to assemble the components of Ossila FACT1, make sure that the cables and connections do not present any damage or alteration that can compromise the safety of the personnel in charge of the measurement unit and/or affect the performance of the device. In addition, you must read the NI PXI-4132 SMU, NI PXIe-PCIe8361 and NI PXIe-1071 User’s manual first, which are provided with this document, with particular reference to the Safety Information and System Specifications. Do not operate any third party devices provided with Ossila FACT1 outside the operational range specified by their respective manufacturers. Do not dislodge the two PXI-4132 SMU units and the NI PXIe-PCIe8361 from the NI PXIe-1071 Chassis without consulting their respective User’s Manuals. Ossila must not be held responsible for any injury or damage due to the non strict observance of the guideline outlined in the User’s Manuals of any third party equipment provided as part of Ossila FACT1. Ossila Ltd Copyright © 2009 – 2012 9 enabling organic electronics Software Installation In the case Ossila FACT1 software and drivers have not been previously installed (or in case of reinstallation of Ossila FACT1 software package), you must install the Installer first. Insert the CD/DVD provided in the CD/DVD reader and wait for the auto-installation window to appear and follow the on screen instructions. The installer will automatically install the main and ancillary software and the drivers. If the auto-run is not functional, you may need to open the CD/DVD and locate the executable (named setup) and double-click its icon to start the self – installation. The software package is composed of the following parts: 1) 2) 3) 4) 5) 6) 7) 8) Ossila FACT1 (head file) LabVIEW® Run-Time Engine 2012 f3 or later version. NI-DAQmx Core Runtime 9.5.5. NI-DAQmx MAX Configuration Support 9.5.5. NI-DCPower 1.7. NI-DCPower Run-Time 1.7 f1. NI-VISA Configuration Support 5.2. NI-VISA Runtime 5.2. Ossila FACT1 is the Ossila developed application controlling (through the drivers) measurement units, Ossila Box and the output\input functionalities. Items 2) to 8) are the National Instrument software providing the support to Ossila FACT1 (LabVIEW® Run-Time Engine) and the drivers required to operate the hardware components of Ossila FACT1. The NI support software and drivers can be freely downloaded from the National Instruments website (www.ni.com), under the condition that the User complies with the National Instruments Licence Agreement for each downloaded software. In case Ossila FACT1 installation CD/DVD package does not contain all the required software, you must install Ossila FACT1 first, and then the ancillary software and drivers. Please, make sure that you are installing the correct version of the required software as specified in this User’s Manual. If any of the ancillary software and drivers is missing, Ossila FACT1 will prompt a pop-up window with a list of the missing item(s) and a reference to the National Instrument website as software repository. Please contact Ossila if you experience any problem during the software installation. Ossila Ltd Copyright © 2009 – 2012 10 enabling organic electronics Equipment setup 1) Once the software has been installed, you must switch off the computer before you start to set up Ossila FACT1. With all the devices switched off, place the components of Ossila FACT1 using Figure 1 as a guideline. In order to achieve high precision measurement, it is important to reduce any source of electromagnetic interference: avoid operating the system with a mobile phone or any other electronic devices in the proximity of the PXI SMUs and Ossila Box; maximise the distance between the measurement units (SMUs and Ossila Box) and the computer case (as depicted in Figure 1). 2) Connect the two coaxial cables connectors (Gate and Drain) to their respective female sockets on the Ossila Box front panel, see Figure 2. Channel A is the Gate channel, while Channel B is the Drain. Plug the NI PXI-4132 Front Panel I/O Connector located at the other ends of the coaxial cable to the NI PXI-4132. The PXI in slot 2 is the Gate source, while slot 3 is the Drain source. Be careful to plug the connectors correctly, take advantage of the labels at both ends of the cables to double-check the connections. NOTE The I/O PXI connectors must be plugged in a manner such that the warning label is on the right side of both connectors (In case you plug the two I/O PXI connectors the other way around, no output power will be supplied to the Ossila Box and, consequently, no measurement can be carried out), see Figure 3. In FACT1, these connections allow the two PXIs to supply the source output (Gate and Drain voltages) to the measurement targets (OFETs) and to measure the input (Drain and Gate currents). 3) Connect the serial port of the NI PXIe-8361 (slot 1 of the PXI Chassis) to the NI PCIe-8361 card (mounted on the back of the computer case) using the serial port cable provided, see Figure 4. 4) Use the longest USB cable provided to connect the Ossila Box with the computer case. To this purpose, plug the Standard B USB plug to the Standard B USB receptacle located on the front panel of Ossila Box, see Figure 5. Plug the Standard A USB end of this cable to any USB socket on the computer case capable to deliver enough electrical current to efficiently and stably operate the relays mounted inside the Ossila Box. The purpose of this connection is two-fold: it allows the communication necessary to programmatically control the state of the relays while supplying the electrical power necessary to switch on/off the relays. NOTE The USB ports on the back of the desktop computer may supply more electrical power that the ones located on the front. 5) Connect the touch-screen display to the computer case using the second USB connection provided. Finally, connect the computer case, touch screen display and PXI chassis to the power grid. Ossila Ltd Copyright © 2009 – 2012 11 enabling organic electronics Figure 1Update photos: Ossila FACT1 set up. Figure 2. Coaxial Cables connection: Channel A is the Gate, Channel B is the Drain. Ossila Ltd Copyright © 2009 – 2012 12 enabling organic electronics Figure 3. I/O PXI connectors. The left side PXI (slot2) is the Gate, the right side one (slot 3) cis the drain. Pay attention to how you plug thses connections: the warning labels has to be on the right of the connetor. Figure 4. Connect the PXI chassis to the computer case using the serial port cable provided. Ossila Ltd Copyright © 2009 – 2012 13 enabling organic electronics Figure 5. Connect the Ossila BOX to the desktop computer Ossila Ltd Copyright © 2009 – 2012 14 enabling organic electronics Getting started: MAX© (Measurement and Automation Explorer1) Legal Notice. This section is neither a comprehensive nor a partial User’s guide to Measurement and Automation Explorer or any other National Instruments (hereafter NI) products. The scope of this section is to provide the Users with the information necessary to install, test and maintain the accuracy level of Ossila FACT1 measurement system. Accordingly, this section is exclusively intended for Ossila FACT1 users and any other use is explicitly forbidden. Please, refer to National Instruments Measurement and Automation Explorer Help for comprehensive documentation and User’s guide. MAX is an NI product covered by one or more of the following Patents: U.S. Patent No(s) 6,690,390; 7,130,760; 7,134,109; 7,152,116. Introduction MAX (Measurement and Automation Explorer) is the National Instruments application that provides direct access to NI hardware. According to NI specifications2, MAX can be used to Configure your National Instruments hardware and software Back up or replicate configuration data Create and edit channels, tasks, interfaces, scales, and virtual instruments Execute system diagnostics View devices and instruments connected to your system Update your National Instruments software In the following, we refer to the Source Measurement Units (SMU) dedicated to source and measure the gate and drain voltage/current of transistor as GATE and DRAIN, respectively. Gate and drain (lower-case letter) refers to the transistor gate and drain, respectively. Configure and Test National Instrument Hardware used by Ossila FACT Make sure that all the connections between the Ossila FACT1 units are well-connected, all the power cords are plugged in and the Ossila Box toggle switch is ON. Before booting the computer you must switch on the PXI chassis (otherwise the computer will be unable to communicate with the PXIs). 1. Open NI MAX; 2. On the left side MAX subpanel, click on My System. NI USB-6501 Settings 3. Click on Device and Interface: a list of devices installed or simulated on the computer will appear, see Fig. 6; If the USB cable is properly connected to both PC and FACT Box, the NI USB-6501 icon is green. The icon of a device installed but not currently present or properly connected is grey with a superimposed red cross; 4. Check if the device alias name is “SwitchControl”; 1 2 MAX, Measurement and Automation Explorer, ©1999-20013 National Instruments. All right reserved Measurement and Automation Explorer Help, Version 370694R-01, June 2013. Ossila Ltd Copyright © 2009 – 2012 15 enabling organic electronics Ossila FACT uses the case-sensitivity alias name to communicate and control the NI hardware. Missing or miswritten alias prevents the programme from functioning and no measurements can be acquired; When first installed, MAX assigns a standard alias name to MAX-compatible hardware. For NI USB-6501, this is “DevN”, where N is a integer indicating the number of device currently installed on the computer. To change the alias right-click on the alias name, select Rename on the drop-down menu and input the new alias. 5. Familiarise with the tool bar commands on the central subpanel of MAX, see Fig. 6, 6. Use Reset to reset SwitchControl and Self-Test to test the hardware. SMU Settings 7. On the left side panel, click on the arrow next to NI PXIe-1071 “Chassis 1” to expand the associated tree menu, see Fig 7. The PXI interface card and the two PXI SMUs installed are listed as 1: NI PXIe-83060 “Remote Control”, 2: NI PXI 4132 “PXIGATE”, 3: NI PXI 4132 “PXIDRAIN” . 8. Rename the alias if necessary. 9. Click on “PXIGATE”. 10. Check in Settings that the Slot Number is 2. 11. Locate this slot on the PXI Chassis (the slot numbers are written on the bottom frame of the PXI Chassis, just below the PXI slots). 12. Click Reset and Self-Test to reset and check that PXIGATE is properly installed and communicates correctly with the computer. 13. Click Refresh and check the Current Temperature. Temperatures outside the operational recommended range (23 oC ± 5 oC ) can affect the accuracy of both output and input of Source Measurements Units, refer to “Measurement Accuracy” section of this User’s Guide and NI PXI-4132 Specifications for further information on this topic. 14. Click on Self-Calibration to execute a self calibration to increases the accuracy of the SMU. Make sure that the temperature of the SMU is in a five degree Celsius interval of the selfcalibration temperature. For more information on self-calibration and accuracy refer to the “Self-Calibration” section of this User’s Guide. 15. Click on Test Panel to open the NI-DCPOWER Soft Front Panel user interface, see Fig. 8. The Soft Panel can be used to perform single point current or voltage measurement. 16. Select DC Voltage, 10 V Range, Voltage level = 5 V and local sense, see Fig 8. 17. Select Output Enabled to enable the output and measure the current. Check that the Output Status led on the PXI GATE switches on when output is enabled. 18. Disable the output and close the Soft Panel. Note. When Reset is executed, the output is automatically disabled and the PXI is reset to a well-defined internal status. 19. Select PXI DRAIN and repeat steps 7 to 11; check that PXIDRAIN is mounted in Slot Number 3. Ossila Ltd Copyright © 2009 – 2012 16 enabling organic electronics Note. Providing the gate and drain input of Ossila FACT Box are connected to the correct SMU, the two PXIGATE and DRAIN are interchangeable. However, in order to optimise measurement accuracy, it is advised to use slot 2 for PXIGATE and slot 3 for PXIDRAIN. Figure 6. SwitchControl (NI USB 6501) MAX front panel. Figure 7. SMU (PXIDRAIN, PXIGATE and Remote Controller) MAX interface Ossila Ltd Copyright © 2009 – 2012 17 enabling organic electronics Figure 8. NI-DC Soft Front Panel. Ossila Ltd Copyright © 2009 – 2012 18 enabling organic electronics Getting started: Front Panel Make sure that all the connections between the Ossila FACT1 units are well-connected, all the power cords are plugged in and the Ossila Box toggle switch is ON. Before booting the computer you must switch on the PXI chassis (otherwise the computer will be unable to communicate with the PXIs and Ossila FACT1 will generate a fatal error when opened). After switching on the PXI, wait a few seconds, then boot the computer and double click on the Ossila FACT1 blue icon on the Desktop. The main User Interface (henceforth referred as UI) of Ossila FACT1 should now appear on the computer screen, while the LED mounted on the Ossila BOX sequentially switch ON/OFF signalling that the relays are properly controlled and powered by the USB connection. NOTE In order to improve the User’s experience, it is advisable to maximise the window size of the main UI using the Maximise control on the control bar. The main UI (see Figure 9) is organized in two panes. The narrow left side pane is the input pane, where the main controls and setting buttons are located; the larger right side pane is the output pane and is reserved to the visual output of the measurement and indicators. Input Pane From top to bottom, SETTING. When pressed, a second pop-up window UI prompts the User to input the measurement setting; see the section “Getting started: Taking a measurement,” for more details. CANCEL. This command interrupts the acquisition. SKIP. This control stops the current Device Under Measurement (DUM) acquisition and force the programme to advance the acquisition to the successive device. PXI SETTING. This is used to set the parameter controlling the PXI acquisition, see “PXI Advanced Setting” in “Measurement Accuracy”section for the relevant information on how to configure the PXI correctly. PXI RESET. Press this controls to execute a check on the hardware installed. Upon pressing PXI RESET, the programme checks for the hardware installed and the state of its connection. In addition, it executes a complete sequential switch ON/OFF of the five relays and relative LEDs mounted on the Ossila Box. This functionality executes automatically when Ossila FACT1 is opened. The result of the hardware check is written in the box “Hardware Installed”. Note If the PXI Chassis is disconnected, the computer must be rebooted to relink the Chassis to the computer. If the USB becomes accidentally disconnected, Ossila FACT1 automatically Ossila Ltd Copyright © 2009 – 2012 19 enabling organic electronics relink the USB channel upon pressing PXI RESET or during the initialisation step of the measurement procedure. Output Pane I-V Characteristic Curves and Transfer Characteristic Curves. These two graphs depict the two main raw data sets acquired by Ossila FACT1. The first shows the Output Characteristic (drain current versus drain voltage, I-V for short) of the transistor, while the second graph represents the Transfer Characteristic (TC) curves for the transistor operated in the Linear and Saturation regions, i.e. IDS(VGS). Leakage Current. This ancillary plot shows the IGS versus VDS for any I-V curves. Mobility, Best Fit Saturation Mode, Best Fit Linear Region. Differently from the previous output plots, these graphs are obtained through data analysis subroutine and their meaning will be detailed in the section “Carrier Mobility Estimation.” Compliance LEDs. The compliance LEDs inform the User whether the PXI Source Measurement Unit hits compliance, i.e. whether the measured current exceed the Current Limit. Gate Current Threshold. Gate Current Threshold is the User’s selected threshold setting, a limit to the gate current (Leakage Current) that the PXI Gate is allowed to measure as the PXI Drain sweeps through the Drain Voltages. Figure 9. Main Ossila FACT1 User Interface (UI). Ossila Ltd Copyright © 2009 – 2012 20 enabling organic electronics Getting Started: Taking a Measurement When Ossila FACT1 opens, and the system is correctly set up, the system enters the idle state and is ready to acquire the first set of measurements. The bullet points below outline how to enter the measurement parameters. Select SETTING on the main UI (Figure 9). A second UI appears on the screen as pop-up window, Select Devices to Measure and Measurement Type UI, see Figure 11I. NOTE The main UI is now irresponsive, you must close this pop-up window to return the control to the main UI. Select Devices to Measure and Measurement Type Select MEASURE ALL to acquire both I-V and Transfer Characteristic Curves (including mobility estimation) for all five devices. The UI closes and the programme is now committed to automatically execute a complete measurement cycle using the parameters that the User will input through the subsequent pop-up window, Enter Parameters (see below). The User can also customise the measurement by selecting which device(s) to measure and whether to measure I-V, TC curves or both. The devices to measure are selected on the lower section of the pop-up window through the square buttons (1 to 5). The rectangular buttons, I-V CURVES and TC CURVES, select the measurement type. The User must then press SUBMIT in order to commit the customised measurement, see Figure 11. Note. MEASURE ALL overrides any selection made on the Customize Your Measurement subpane. Press CANCEL to interrupt the measurement setting and return the control to the main UI. Enter Measurement Input and Device Parameters. Enter Measurement Input and Device Parameters (pop-up window) UI can be used to enter the measurement parameters and the input necessary to extract the carrier mobility, see Figure 12. The input field of this UI is dived in two main sub-panes. The upper pane is used to enter the parameters controlling the acquisition of the I-V curves or OUTPUT CHARACTERISTICS of transistors. The lower sub-pane is dedicated to the setting of the TRANSFER CHARACTERISTICS (TC) measurement plus CARRIER MOBILITY estimation. For both subpanes, the left side (red colour buttons) is controlling the GATE (PXI in slot 2), while the left side (blue colour) is reserved to the DRAIN controls (PXI in slot 3). Ossila Ltd Copyright © 2009 – 2012 21 enabling organic electronics Note. Both input and output quantities are represented in SI (International System) prefix on Ossila FACT1 user interface, see table below SI prefix pico nano micro milli Factor 10-12 10-9 10-6 10-3 Symbol p n u m Figure 10. Select Devices and Measurement Type UI. This is a pop-up window which allows you to select which devices to measure and what to measure Ossila Ltd Copyright © 2009 – 2012 22 enabling organic electronics Figure 11. In this example, I-V and TC curves are acquired for Device 1, 4 and 5. You must press the SUBMIT button to commit your customised measurement. In the case you customise the measurement you must select the measurement type (I-V CURVES and/or TC CURVES), otherwise no measurement is carried out. MEASURE ALL will automatically commit a complete measurement cycle on any devices. MEASURE ALL overrides any selection made on the Customize your Measurement section. OUTPUT CHARACTERISTICS (GATE). Select the I-V curves to sweep by choosing Gate Voltage Start, Gate Voltage End and Gate Sweeps, respectively. The last selection determines how many curves are swept for each selected device. For example, with the selection on Figure 12, Ossila FACT1 sweeps four I-V curves , IDS (VDS), at VGS = (0 V, -20 V, -40 V, -60 V), with It follows that if is known, the number of Gate Sweeps is given by Gate Sweeps allows the User to select any number of I-V curves from 1 to 100. NOTE Due to hardware limitations, the maximum voltage that is possible to safely handle with Ossila FACT1 is ±100 V, therefore the controls were programmed not to accept values exceeding this threshold. Ossila Ltd Copyright © 2009 – 2012 23 enabling organic electronics NOTE Both current and voltage is measured by the SMUs. Consequently, the actual values logged in the data file can show up to few tens of mV discrepancy with the voltage input depending on the voltage range being generated, temperature and measurement setting. Delay is the total settling time and determines for how long an output is applied before the next step of the measurement subroutine is executed. Specifically, GATE delay is the lapse time between the application of the gate voltage and the first drain voltage of the sweep. Delay must be larger than the time required to the system to deliver a stable output and the duration of the transient of the transistor under measurement, see Appendix V. According to the National Instruments specification, the typical settling time of the PXI-4132 is 300 µS on a 1 V step and a load of 50 percent of the current range setting. When the capacitance of Ossila Box is taken into account, and for short BNC cables (i.e.≤ 1 m), the Delay for fast inorganic transistor can be set at 1 ms for 1 V step or lower. Organic transistors have much longer transient time. Accordingly, IEEE3 standard for OFETS characterisation recommends a minimum settling time (dwell time) of 10 ms up to 100 ms for each data point. The appropriate settling time depends on the dielectric, organic semiconductor, OFET architecture and measurement settings. For accurate measurements, indicative Delay values are 100/200 ms for each gate sweeps (GATE Delay, with V) and 10 to 20 ms for each drain current acquired (DRAIN Delay, with ). These values refer to OFF ON sweep. For ON OFF sweep, the required delay times are higher. Refer to the Measurement and Accuracy section for more detailed information on Settling Time. Current Limit specifies the maximum gate current range (IGS) that the GATE source is allowed to induce across the target (OFET, for example). If the current exceed Current Limit, the PXI will complete the acquisition without increasing the voltage further to avoid damaging the internal circuitry. Refer to the Measurement and Accuracy section for the appropriate setting of Current Limit and its relation with measurement accuracy. Max Gate Current. Differently from Current Limit, Max Gate Current is a User’s selected threshold on IGS as leakage current. More specifically, Max Gate Current is the maximum IGS(VDS) that the User deems acceptable for the DUM. If Ileak> IGS, Ossila FACT1 stops acquiring the I-V curves for the particular VGS for which the limit has been exceeded and moves to acquire the next (if any) I-V curve. If the threshold is exceeded during the last I-V sweep, the Transfer Characteristics are not acquired and the programme proceeds to characterise the successive DUM, if any. Use Max Gate Current to speed up data acquisition by avoiding measuring transistors which present very high gate current leakage. Note. Set Max Gate Current to be lower than Current Limit. IEEE recommends gate current leakage to be less than 1% of the drain current IDS(VDS). 3 IEEE Standard for Test Methods for the Characterization of Organic Transistors and Materials; IEEE Std 1620-2008. Ossila Ltd Copyright © 2009 – 2012 24 enabling organic electronics SMU Name is the alias name of the PXI SMU that executes the sourcing and measurement task. Channel Name is the input/output channel executing the acquisition task. Select 0 for each channel. Auto Zero enables and disables Auto Zero functionality. Select Auto Zero Once to execute it only for the first data point for each I-V curves (recommended setting). Use Auto Zero Enabled to execute Auto Zero correction for each acquired data point. Refer to Measurement and Accuracy for detailed information on Auto Zero functionality and duration of the acquisition. Figure 12. Use this UI pop-up window to select the measurement parameters the input required to estimate the mobility. OUTPUT CHARACTERISTICS (DRAIN). The drain section of the OUTPUT CHARACTERISTICS sub-pane governs the DRAIN source, and allows the User to choose start, end and number of drain current points to acquire through the controls Drain Voltage Start, Drain Voltage End, and ΔVDS, respectively. For any VGS, the I-V output characteristics curves IDS(VDS) can then be acquired in correspondence of the following Drain voltages : , where Ossila Ltd and N is the number of data points (number of steps) with Copyright © 2009 – 2012 25 enabling organic electronics Note. Let us suppose that the User wants to acquire a data point for each steps ΔVDS = 1 over the interval Drain Voltage Start =0 V to Drain Voltage End = 10 V, the equation above gives then N = 11, which fulfils the User’s request since the acquisition is carried out from 0 to 10 V over 11 voltages separated by 1 V step. Current Limit specifies the maximum drain current (IDS) that the DRAIN source is allowed to induce in the target (OFET, for example) as the User’s selected gate voltages are applied to the target itself, i.e. Current Limit refers to maximum allowed IDS(VDS) for any selected VGS . Delay. DRAIN Delay is the dwell time between the application of a specific drain voltage and the acquisition of the respective drain and gate current data points. Delay must be greater than the total settling time, which is given by the sum of the system settling time and the DUM transient for drain voltage sweeps, see GATE Delay above. Sweep Back is selected to “sweep back” each I-V curves: for any VGS, Ossila FACT1 measures the drain current from Drain Voltage Start to Drain Voltage End and hence backward from Drain Voltage End back to Drain Voltage Start. SMU Name. Refer to GATE SMU Name. Channel Name. Refer to GATE Channel Name. Auto Zero. Refer to GATE Auto Zero. TRANSFER CHARACTERISTIC (DRAIN). For the Transfer Characteristic two TC curves, IDS(VGS), are acquired for two different values of drain source voltage (linear and saturation transfer characteristics). Drain Voltage (Linear Region) selects the value VDS that the DRAIN source applies to the target, with VDS drain voltage for which the target transistor is operating in Linear Mode, as it appears in the I-V curves when IDS = αVDS, with α proportionality constant. Usually, Drain Voltage (Linear Region) for organic transistors is approximately 5% to 10% of the drain voltage at which the transistor is operating in saturation mode. Drain Voltage (Saturation Mode) is the drain voltage at which the transistor operates in saturation mode, i.e. IDS(VDS) = Isat, with Isat constant drain saturation current reads from the I-V Output Characteristic curves. Delay is the PXI DRAIN settling time. For Transfer Characteristic OFF ON measurement indicative DRAIN and GATE Delay time are 10 to 200 ms and 10 to 100 ms, respectively. The actual delay time depends on dielectric capacitance, organic semiconductor, device architecture and measurement settings. Ossila Ltd Copyright © 2009 – 2012 26 enabling organic electronics Current Limit (not in use for OFET characterisation) specifies the maximum drain current (IDS) that the DRAIN source is allowed to generate across the target (OFET, for example) as the User’s selected gate voltages are applied to the target itself, i.e. Current Limit refers to IDS(VGS) for any VDS applied. TRANSFER CHARACTERISTIC (GATE). For both VDS (Linear and Saturation regime) the Gate sub-panel is used to determine the start, end and measurement points of the Transfer Characteristic curves IDS(VGS) by means of the controls Gate Voltage Start, Gate Voltage End, and ΔVGS, respectively. IDS(VGS) is measured at , with , with and N number of data points (number of steps). N is given by Note Since the TC data is used to estimate the mobility and due to the nature of the estimation algorithm, see the Sec. “Mobility Estimation” below, it is advisable to measure the drain current for (at least) each Volts change in the gate potential, i.e. ≤ and, in any case, acquire no less than 50/60 data points. Current Limit specifies the maximum gate current (IGS) that the GATE source generated across the target (OFET, for example) as the User’s selected drain voltages are applied to the target itself, i.e. Current Limit refers to IGS(VGS) for any VDS applied. Delay is the PXIGATE settling time. For each data point, the current time t=Delay has elapsed from the application of gate voltage . is acquired after a CARRIER MOBILITY. This pane field is used to input the parameters required to calculate the field effect mobility in both Linear and Saturation mode (read carefully the Sec. “Mobility Estimation” for details on how the mobility is calculated and how to interpret the results). The Mobility is expressed in . Fitting Method is used to select the linear regression method used to build the linear fit of IDS(VGS), or the fit of the square root of IDS versus VDS. The possible selections are Least Square, Least Absolute Residual and Bisquare method. Tolerance is the tolerance for the fitting method. It applies to the Least Square and Bisquare methods. Channel Length is the length, expressed in μm, of the transistor channel. By default, Ossila OFET considers support where all five devices have the same channel length. In this case, the common channel length must be inserted in the Channel Length-Fixed input field. In the Ossila Ltd Copyright © 2009 – 2012 27 enabling organic electronics case the transistors on the support have variable channel lengths, the User must disable the Fixed input and enable the variable Channel Length located next to the SUBMIT button. This operation is accomplished through the Variable blue button. Upon pressing Variable, the Fixed input field is disable and greyed out, while the variable Channel Length array input field is enabled. Each entry of this array corresponds to the device specified by the caption printed below the entry itself. Capacitance is the capacitance per unit area of transistor expressed in (Farad per centimetre square). Channel Width is the width of the transistor channel expressed in cm. Note The Channel Length is the distance between the Source and the Drain (it refers to the gate-voltage-induced conducting channel that allows the carriers to move from Source to Drain), while the Channel Width is the transversal dimension of the conducting channel. Commit the Measurement Setting and Data Logging Upon pressing SUBMIT, the measurement settings UI is replaced by the pop-up window prompting the User to enter the file name. The User is advised to enter a short, alphanumeric name/code which identifies the support under study in the File Name filed. The complete name is composed of the time-stamp, User’s File Name, a device label (such as Dev1), a reference to the measurement type (IV or TC for I-V and Transfer Characteristics curves, respectively). Ossila FACT1 generates three files per devices: two xls or spreadsheet files (one for I-V data, the second for TC and mobility); and a screenshot in png format for the six output plots. By default, the data files are enclosed in an appositely generated folder and saved on the User’s Desktop. Upon pressing SAVE, the acquisition starts, while CANCEL returns the control to the main UI Option. The User can disable the create folder and the time-stamp option by using FOLDER and TS buttons, respectively. The location of data logging can be change by selecting a different location with the Folder/File Location ring selector. NOTE. The File Name field does not accept an empty name and colon character as file name. Special characters (#,@,&) and punctuation marks should not be used as file name, while dash and underscore are admissible. Do not add any file extension (such as .txt). The data file can be open with MS Excel© or any other open source spreadsheet reader. Acquisition Process After pressing Save, the acquisition starts and the data is plotted on the graphs on the main UI. In particular, the I-V, TC and Leakage Current graphs are updated immediately after the measurement of each curve is completed. Depending upon the number of point measured and settling time, the acquisition of a single curve may take up to few minutes to be completed and the programme may seem unresponsive. To inform the User that the programme is acquiring data, a round, blinking LED is switched ON during the acquisition state. In addition, the active acquisition state of Ossila FACT1 is Ossila Ltd Copyright © 2009 – 2012 28 enabling organic electronics verifiable by the inspection of the Output state on the PXIs: a yellow LED on the front panel of both PXI-4132 informs the User that both sources (GATE and DRAIN) are effectively applying a potential difference (VGS and VDS) to the target. Figure 13 shows the main UI output panel of Ossila FACT1. Each device has its data output located on a TAB labelled with the device number. You can navigate the table during the acquisition. The User is given the possibility to stop the acquisition pressing the button CANCEL. The CANCEL button should disable and reset the hardware so that the hardware is found in the correct internal state. SKIP button stops the acquisition of the DUM and move to the successive device, if any; otherwise it stops the acquisition and returns the control to the main UI. During the acquisition all the buttons, with the exception of CANCEL and SKIP, are disabled. Warning! When the Output Enabled is ON, the User must be aware that Shock Hazard may exist. Do not touch any part of the Ossila FACT1 that is in direct contact with the voltage sources. To this purpose, if the lid of Ossila Box is open, the contact between the measurement unit (i.e. the board hosting the target) and the source is interrupted. Do not open the lid of Ossila Box when the Output Enable LED is ON, this may force the PXI to generate a Hardware error which, in turn, will stop Ossila FACT1. If for any reason Ossila FACT1 terminated the acquisition prematurely, or the User decides to stop the acquisition, but Output Enabled is still ON, the User must press PXI RESET in order to allow the programme to shut down the hardware gracefully. Warning! An inappropriate disabling of the hardware output may results in hardware units characterised by unknown internal state which, in turn, may translate in unexpected behaviour, hardware failure and hence unreliable measurement outcomes. USE PXI RESET to reset the PXI and the USB multiplexer. The completion of the measurement is signalled by a pop-up window informing the User that the acquisition is complete. Upon selecting OK, the User may navigate through the TABs and export the graphs to other applications such as Microsoft Word or Excel. The application can be close by pressing the X button on the right left side of the toolbar (exactly as for any other Windows/Linux/Mac applications). Ossila Ltd Copyright © 2009 – 2012 29 enabling organic electronics Figure 13. Screenshot of the output of the main UI output panel. Carrier Mobility Ossila FACT1 estimates the carrier mobility using the Saturation Mode and Linear Region methods. Saturation Mode. The potential VDS for which the transistor is operating in saturation mode is applied to the transistor by the DRAIN source, while the GATE source sweeps across a range of negative or positive voltages (for p-type or n-type semiconductor, respectively). As a result, a Transfer Characteristic curve in saturation mode, IDS(VGS) at fixed VDS, is acquired. The saturation mode current is approximately governed by the well-known equation, , (1) where L and W are the length and width of the conductive channel, respectively; μ the carrier mobility, and C the capacitance per unit area (in F/cm2). VT, threshold voltage, is the voltage at which the formation of an inversion layer between the insulating layer and the substrate allows for a nonnegligible drain-source current. For VGS < VT, the transistor is said to be switched off since IDS ≈ 0. However, in real devices, IDS below the threshold is small, but different from zero, and, more importantly, the drain current is also a function of VDS. The mobility in saturation mode is obtained inverting Eq. (1), , Ossila Ltd (2) Copyright © 2009 – 2012 30 enabling organic electronics with slope of the root square of the drain current, i.e. . Linear Regime. From the analysis of the I-V output characteristic, it can be deduced that the transistor is operating in a linear regime for small values of VDS. Indicatively, for VDS equals to 5% of VDS at saturation regime, the mathematical relation between IDS and VDS is linear, i.e. IDS = VDS, with constant of proportionality. When this VDS is applied to the transistor by the drain source, while the gate sweeps the device, the Linear Regime transfer characteristic curve for the transistor, IDS(VGS) for constant VDS, is obtained. Using the equation governing the transistor operating in Linear Regime, it is possible to derive an equation for the mobility similar to Eq. (2). In details, assuming the slope of IDS (VGS) at constant VDS in Linear Regime, the mobility reads, . (3) Linear Fit In order to extrapolate the mobility from the experimental data, the slope of the respective Transfer Characteristic curves must be calculated. However, since the measurement data are a set of discrete points, {IDS,i (VGS,i)}, it is necessary to “fit” the experimental data to a straight line first (Linear Fit) and hence calculate the slope of the resulting line. The Linear Fit or Linear Regression is a mathematical tool that, given a set of measurement points such as {IDS,i (VGS,i)}, is looking for the straight line that best fits the data. Schematically, Linear Fit {IDS,i (VGS,i)} → Measurement data (Set of discrete points) → IDS (VGS) = VGS Straight line with slope The linear regression is meaningful only when the mathematical (theoretical) relation between the set of experimental data is linear. In the case of a TC transistor curves in Saturation mode, a linear relation between the square root of IDS and VGS holds only for values of VGS much greater than VT, the threshold voltage. Therefore, for p(n)-type (VGS) = VGS when VGS is large and negative(positive). The same for transistor operating in Linear Regime with, (VGS) = VGS for VGS greater than VT. In addition, for organic transistor, the mobility tends to be a function of the gate voltage, i.e. μ=μ(VGS). Therefore, Eq 2 and 3 should more appropriately be written as (4) Ossila Ltd Copyright © 2009 – 2012 31 enabling organic electronics and . (5) Ossila FACT1 estimates the mobility as function of the gate voltage automatically. In order to automatically estimate the mobility, Ossila FACT1 executes the following algorithm, 1. The input and output points defining the Transfer Characteristics curves (VGS,i, IDS,i) are dived into subsets of ten point each. 2. For each subset, the Best Linear Fit and its respective slope are estimated. 3. The mobility is then computed using Eq (2) for the Transfer Characteristic in Saturation mode, and Eq (3) for the Transfer Characteristic in Linear Regime. 4. The mobility is plotted for each ten-point subsets. For both linear and saturation regime, the maximum mobility is highlighted on the mobility plot and reported on the data file providing that the linear fit R squared4 parameter is larger than 0.999 (0.99 for the Linear Regime mobility). If no data-point set satisfies this condition, the mobility plot turns red with an exclamation mark in the plot legend flagging which mobility does not fulfil this requirement. A warning message is also logged in the data file. Example. Let us suppose that a TC curve is acquired for Gate voltages ranging from 0 to -80 V at a constant Drain voltage of -60 V, where the transistor is operating in Saturation mode. Let also suppose that the drain current is measured for any voltage change, i.e. ΔVGS=1V. When the measurement is completed, the TC data set is represented by 81 couples (VGS,i, IDS,i), with i index labelling the input/output couples. The first couple, (VGS,0=0, IDS,0) is discarded, while the rest of the data is organized in ten-point subset. The first subset is formed by the gate voltages (-1, -2, -3, ..., -9, -10) V and the respective measured currents. The second is composed by the gate voltages (-11, -12, -13, ..., -19, -20) V with the current measured at these gate voltages and so on. For each subset, the linear fit is calculated and its slope is used to calculate the mobility through Eq (2). The motilities so obtained, are then plotted as function of the average gate voltage for each subset, which in these example are -5.5 V, -15.5 V, -25.5 V, and so on till -75.5 V. Fig 14 shows the mobility calculated with the modified linear fit method (using Eq 2 for each data set) and the explicit definition of gate dependent mobility (Eq 4). The derivative in Eq 4 is calculated using the backward numerical differentiation (BW) and the more error-robust two-point method (TW). Since the numerical differentiation amplifies the measurement uncertainty (noise), the resulting mobility curve can be non-smooth and “noisy”. On the other hand, the modified linear fit method extrapolates the 4 2 2 R squared (R ) is a statistic ranging from 0 to 1 which assume the value R = 1 in case the linear fit exactly 2 describes the relation between the data points, and R = 0if no (linear) relation between current and voltage exists. Ossila Ltd Copyright © 2009 – 2012 32 enabling organic electronics mobility over ten data-point set and is therefore intrinsically more robust against measurement noise while still providing the correct gate voltage dependence of the mobility. Figure 14 Comparison between the field effect saturation mobility calculated from the modified Eq 2 (Linear Fit), and Eq 4 (BW, TP) using two different numerical derivative methods. For each data set, the Linear Fit mobility is plotted versus the mid-point of the interval, i,e. For VGS = -25 V, - 35 V and so on. This method has the advantage of not requiring any arbitrary selection of the of input/output to discard because falling outside the validity range of Eq 2 and 3. Issue with OFET mobility. Equations 2 to 5 are only approximation of the actual OFET behaviour. Due to the complex nature of charge transport, dielectric effects, surface traps, environmental degradation and environmental electromagnetic noise affecting the measurement of low currents, the mobility extrapolated from the equations above is not always reliable. In the following, non exhaustive list, typical common issues with interpretation of mobility data is presented. 1) Mobility values extrapolated outside the range of validity of Eqs 2 and 3 can be erroneously given as acceptable maximum mobility by Ossila FACT because they passed the R squared condition. The User should always check that the maximum mobility is extrapolated in correspondence of data set for which the validity of Eq 2 and 3 is assumed. 2) Due to impurity, degradation etc, a linear relation might not exist between the voltage and the current in both saturation and liner a regime. Consequently, the mobility cannot be reliably calculated using the Eqs 2 to 4 above. 3) In principle, linear and saturation mobility should give approximately the same result; however, due to unavoidable measurement inaccuracy, and the approximate nature of Eqs (2) and (3), the two methods may lead to quite different numerical values for the mobility of organic transistors. Ossila Ltd Copyright © 2009 – 2012 33 enabling organic electronics Fitting Method Ossila FACT1 gives the User the possibility of choosing among three fitting methods: Least Square Least Absolute Residual Bisquare (also known as Tukey's biweight) If the noise on the measured values (IDS,i) is described by a Gaussian distribution, the Least Square method should suffice. The Bisquare method is a robust fitting method to be applied if outliers are present. Outliers are point that lies far away from the majority of the measured data, a phenomenon that may be caused by short and strong external interferences during the measurement acquisition. Whereas the Bisquare method is robust against outliers (the resulting Linear Fit does not strongly depends on few points located far away from the rest of the data set), the Least Square is severely affected by the these points. The Tolerance (applicable to Least Square and Bisquare method only) determines when stop the iterative adjustment of the slope and intercept of the Linear Fit. The Linear Fit is extrapolated from the data set using iterative methods. At each interaction, the slope and the intercept of the Linear Fit approaches the Best Linear Fit. If the residual between two iterations is less than Tolerance, the iteration is terminated and the slope and intercept of the resulting Linear Fit are returned. The minimum value of Tolerance is 0.0001. Please, refer to any statistical data analysis manual/textbook for any detailed explanation of the Linear Fit methods, limitations etc. Goodness of the Fit Ossila FACT1 computes the confidence interval for each Linear Regression. In statistics, the confidence interval defines how reliable the Linear Fit is; more precisely, there is a 95% probability that the “actual” Best Fit lies inside the confidence interval calculated by Ossila FACT1. A large confidence interval can signify that or the “Linear Assumption” is not correct (the measurement are not linearly dependent on the input, IDS (VGS) ≠ VGS ) or the measured data are strongly affected by errors and external noise. Ossila Ltd Copyright © 2009 – 2012 34 enabling organic electronics The boundaries of the confidence interval are called Upper and Lower Bound, which are plotted on the Best Linear Fit graphs of Ossila FACT1 UI for both Saturation and Linear Region, see Figure 2. Figure 6. Linear Fit (Red, solid line) and Upper and Lower Bound defining the confidence interval (dashed blue line) for two subsets of input (Gate Voltages) and measured point (Drain Current) for TC in Saturation Mode. Ossila FACT1 computes and logged on the TC output files, two extra statistical parameters useful to assess the goodness of the Linear Fit. These are, R-square - The closer to 1 the R-square, the better the fit. RMSE (Root Mean Square Error) The smaller the RMSE, the better the fit Please, refer to any statistical data analysis manual/textbook for any detailed explanation of these parameters. Ossila Ltd Copyright © 2009 – 2012 35 enabling organic electronics Measurement and Accuracy The two PXI Source Measurement Units (SMUs) are capable of very accurate voltage and current measurements, see “SMU Specifications” section in the NI PXI-4132 Specifications documents. The sensitivity and accuracy of the SMU is strongly affected by electromagnetic noise (such as the one generated by mobile phones, computers too close to the SMU, etc), temperature and, most important, the PXI measurement settings. In particular, when low currents (of the order of magnitude of few tens of nano Ampere or less) are measured, external interferences and inappropriate setting may sensibly reduce the accuracy or (if the order of magnitude of the “noise” is comparable or larger than the current being measured) even hamper the measurement. Temperature and Self-Calibration As specified by the NI-4132 Specifications, PXI SMU should be operated at a temperature of 23 0C ± 5 0 C. Outside this temperature range, the nominal resolution of both output and measurement cannot be guaranteed. Operating under high humidity (>90%) or dusty conditions may cause increased leakage between circuit components and can result in additional sourcing and measurement errors. To limit the detrimental effect of temperature, humidity and ageing is advisable to execute a SelfCalibration regularly through Measurement and Automation (MAX). In particular, PXIGATE and DRAIN self-calibration is recommended every time the environment conditions (temperature and humidity) change considerably. Note. Execute the self-calibration after 10/15 minutes the PXIs are switched on so to allow enough time for both SMUs to reach a stable internal temperature. Set the chassis fan (toggle on the back panel of the chassis) on the high position to allow better control of the internal temperature and reduce output/input noise. Calculation of the Measurement Accuracy For a SMU, the transfer function is given by5 y = gx +b, Eq 6 where g is the gain, b the offset, x the input and y the output. For an ideal SMU b=0 and m=1 and therefore y=x. For an actual SMU, however, m ≠1 and b≠0. For the NI PXI 4132, current 5 NI DC power Supply SMU Help. Ossila Ltd Copyright © 2009 – 2012 36 enabling organic electronics measurement accuracy 6 at 23 0C ± 5 0C is reported in the table below (from NI PXI 4132 Specification) Range 10 μA 100 μA 1 mA 10 mA 100 mA Current Measurement Accuracy and Resolution Resolution Accuracy ± (% of reading + offset) 10 pA 0.028% + 1.0 nA 100 pA 0.028% + 10 nA 1 nA 0.028% + 0.1 μA 10 nA 0.028% + 1.0 μA 100 nA 0.028% + 10 μA Here resolution means the smallest difference in current that the SMU is capable of discriminate, while accuracy is the measurement uncertainty. From this table and Eq 6, the accuracy of a current I = 2mA measured in the 10 mA range is then given by (m=0.028%; x= 2mA and b =1.0 μA) Accuracy = 2 x (0.028)/100 mA + 1.0 μA = 0.56 μA + 1.0 μA = 1.56 μA Therefore, the current and its uncertainty are I = 2mA ± 1.56 μA. Ossila FACT1 automatically selects the appropriate measurement range depending on the PXI Current Limit chosen by the User. For each current acquisition chose the appropriate Current Limit, i.e. a value that is greater than the maximum (expected) current under measurement but not greater than the lowest SMU current range required for the measurement. For example, if PXIDRAIN Current Limit for the OFET Characteristic Curves is set to 10 uA or less, the PXIDRAIN carries out the measurement in the 10 μA range. On the other hand, if the maximum current is expected to be 50/60 μA, choose as Current Limit any value greater than 60 and not larger than 100 uA (100 uA is acceptable). For the sake of easy reference, the PXI voltage output and voltage measurement accuracy and resolution are also reported in the two tables below. Range ±10 V ±100 V Voltage Output Accuracy and Resolution Resolution Accuracy ± (%of reading +offset) 50 μV 0.025% + 3.0 mV 500 μV 0.025% + 10 mV 6 Refer to NI PXI 4132 Specification for more detailed information on output and measurement accuracy and resolution. Ossila Ltd Copyright © 2009 – 2012 37 enabling organic electronics Range ±10 V ±100 V Voltage Measurement Accuracy and Resolution Resolution Accuracy ± (%of reading +offset) 10 μV 0.02% + 3.0 mV 100 μV 0.02% + 5.0 mV Temperature Effects on SMU Accuracy Devices operating outside the five degree range of the last calibration temperature, with the calibration carried out no later than one year from the time the acquisition is carried out, have an accuracy that is given by the sum of the “factory standard accuracy” (see above) with an extra term depending on the Tempco (temperature coefficient), where Tempco is express as % of the factory accuracy specification per degree oC. For NI PXI 4132, Tempco is 15 %. As an example, let us suppose that a PXI calibrated at T = 25 oC is operated at 35 oC. The PXI is use as SMU with output voltage Vout = 20 V. From the Voltage Output accuracy table and Eq. 6, the uncertainty on the output is given by Accuracy = 20 x ( 0.025)/100 + 10 mV = 15 mV. The correction factor due to the temperature is Temp_Accuracy = Accuracy x (Tempo)/100 *|Calibration_temp – Meas_Temperature| = 15 x (15)/100 x 10 = 22.5 mV. The PXI output is then given by Vout = 20 V ± 37.5 mV. PXI Advanced Setting The PSI SMU measurement setting can be programmatically controlled using the PXI SETTING functionality. Upon selecting PXI SETTING on the main UI of Ossila FACT1, the PXI Fine Setting input field is activated and the User can change the default measurement configurations by modifying the PLC, Sample To Average and Aperture Time. PLC. Power Line Cycle is the oscillation frequency of the AC current supplied to the end-users through the electrical power grid. In the EU, Australia, part of Japan and several other countries, the PLC is 50 Hz with a voltage range of 220-240 V, while in Taiwan, USA and Canada, part of Japan, etc the PLC is 60 Hz with a voltage range of 100-120 V. Ossila Ltd Copyright © 2009 – 2012 38 enabling organic electronics It is of paramount importance that the PLC selected in PXI Setting is the PLC of the power grid used to power the SMUs, otherwise small current measurement will be strongly affected by the oscillatory nature of the AC supply current. Sample To Average. If Sample To Average is set to N, the SMU takes N independent measurements, which are then averaged so that a single (averaged) output is returned. For the PXI-4132, N can be any integer number from 1 to 127. Increasing N improves accuracy and reduces the noise; however, in order to optimise the PXI performance, it may also be necessary to modify the Aperture Time accordingly. Aperture Time defines the measurement, i.e. the time that the SMU allocates to the acquisition of a single measurement output. Aperture Time is expressed in unit of PLC. The actual value of Aperture Time therefore depends on the PLC frequency, as detailed in the following table where Aperture Time is expressed in term of PLC units and seconds (From NI PXI-4132 Specifications), PLC 8 4 2 1 1/2 1/4 1/8 1/16 1/32 1/64 Aperture Time PLC Input 60 Hz 8 133 ms 4 66.6 ms 2 33.3 ms 1 16.6 ms 0.5 8.33 ms 0.25 4.16 ms 0.125 133 ms 0.0625 1.04 ms 0.031250 520 µs 0.015625 260 µs 50 Hz 160 ms 80.0 ms 40.0 ms 20.0 ms 10.0 ms 5.00 ms 2.50 ms 1.25 ms 625 µs 312 µs Increasing Sample to Average and Aperture Time accordingly allows for noise reduction and optimal AC Power Line Rejection: the SMU unit can be made insensitive to the PLC oscillations of the electrical power grid. NOTE. Aperture time = 1 (1 PLC) and Sample To Average = 1 are the standard measurement setting. Use Sample To Average = 2 (or higher Aperture Time and/or Sample To Average) to increase accuracy at the expense of acquisition time. Lower Aperture Times allow for faster acquisition at the expense of poorer PLC noise rejection. Auto Zero High accuracy measurement requires the Auto Zero function to be enabled. With Auto Zero enabled, the PXI takes an “internal measurement” each time it samples the target. The internal measurement is then subtracted from the raw target output in order to reduce the effect of the internal PXI noise on the currents. Auto Zero is used to increase the accuracy of the measurement and in particular current offset due to temperature, humidity, aging and environmental noise. Ossila Ltd Copyright © 2009 – 2012 39 enabling organic electronics Let us suppose that Sample to Average is set to N=2, while Auto Zero is enabled. The output (IDS or IGS) is then acquired through the following sequence, Sample 1 Settling time Auto Zero Settling time S1 = Sample 1 – Auto Zero Sample 2 Settling time Auto Zero Settling time S2 = Sample 2 – Auto Zero The output delivered by the PXIs (gate current, for example) is then IGS = (S1 + S2)/2. If the Auto Zero is set to once, Auto Zero will be carried out only after the first measurement for each acquired voltage-current curve. Auto Zero Enable almost doubles the acquisition time. Auto Zero Once is the recommended setting for CC and TC curves, while Auto Zero Enable is preferable for high precision acquisition of TC curves parameters, such as ON/OFF ratio and OFF current, for which very low current measurements are required. Ossila Ltd Copyright © 2009 – 2012 40 enabling organic electronics List of Symbols and Acronyms VGS : Gate–Source potential difference VDS : Drain–Source potential difference IGS : Gate–Source current IDS : Darin–Source current ΔVGS : Gate Voltage step width ΔVDS : Gate Voltage step width ΔVGS : Drain Voltage step width f(x) : f is a function of the independent variable x. Therefore, IDS(VGS) : IDS is a function of (depends on) the independent variable VDS IDS(VDS) : IDS is a function of (depends on) the independent variable VDS IGS,i(VGS,i): Current measured at VGS,i =i×ΔVGS, with i = {0,1,2...,Measurements Points}; the same for the drain current. I-V curves: Output Characteristic curves IDS(VDS) SMU: Source Measurement Units TC: Transfer Characteristic IDS(VGS) Ossila Ltd Copyright © 2009 – 2012 41 enabling organic electronics Ossila FACT1 Troubleshooting Ossila FACT1 does not start. Check if the programme is installed. Action Required: Go to Start>>Control Panel>>Programs>>Programs and Features. If Ossila FACT1 does not appear in the list of installed programs, reinstall Ossila FACT1. Ossila FACT1 opens but it closes immediately with an error message. Check the error message and take action accordingly. Possible reasons for this malfunction are 1) Drivers or Run-time Engine 2013 (or later) not installed. Action Required: Install the correct drivers and/or the Run-Time Engine 2012, the list of required ancillary software and drivers can be found in the Setting up section of the User’s Manual. 2) USB cable between the computer case and Ossila BOX disconnected or not properly connected. Action Required: Plug the Standard A and Standard B sockets of the USB connections properly. Reboot the computer. Ossila FACT1 opens but it stops when the measurement is initiated. Check the error message, if any. Check on “Hardware Installed” box of the main UI of Ossila FATC whether at least one PXI-4132 is identified as “CONNECTED” (the second PXI is never recognised as connected). Action Required: If both PXI-4132 are identified as “NON-CONNECTED”, check the serial connection between the PXIe-PCIe8361 on the Chassis and the PXIe-PCIe8361 Card mounted on the back side of the Dell Vostro computer case. Reboot the computer afterwards. Ossila FACT1 runs, it performs the measurement cycle, the output is constituted by noise current. 1) Ossila Box toggle switch is OFF Action Required: switch ON Ossila Box 2) The Lid of Ossila Box is open Action Required: Close the Lid, make sure that the Lid presses against the safety relay so that the relay is ON when the Lid is shut. 3) The push-fit connector of the test board (inside Ossila Box) is not present or not properly fitted. Action Required: Make sure that the push-fit connector is tightly arranged on the top of the test board. 4) The coaxial cables connecting the PXI-4132s with the Gate and Drain input of Ossila Box (Channel A and B) are not properly connected. Action Required: SWITCH OFF BOTH PXIs and check the connections. Make sure that the Front Panel I/O PXI connectors (Backshell) are both tightly plugged to the PXI receptacles, and that the “WARNING” label is on right side of the I/O PXI Backshell. Ossila Ltd Copyright © 2009 – 2012 42 enabling organic electronics If the problem persists, unplug the Backshell, use a screwdriver to remove their lids and check if the Central Core (D in Figure 1) and the metallic shield (B in Figure 1) of the coaxial cable are connected to the first and fourth pin inside the Backshell. The pin are numbered from top to bottom, with the “WARNING” label of the Backshell on the right side , see NI PXI-4132 Specifications. Make sure that the Central Core and the metallic shield are connected (through the Backshell) to the “High” and “Low” output for both PXIs. The output type of the PXIs can be read directly on their front panels. If the Backshell are opened for maintenance, before use make sure they are properly sealed with both the Central Core and metallic shield tightly wired and completely enclosed inside the Backshell. Ask the assistance of qualified technical support if not acquaintance with the maintenance of high-voltage electrical equipment. Figure 7. Coaxial cable: internal details Ossila Ltd Ossila FACT1 opens, runs and acquire measurement properly but, suddenly, it stops. Check the content of the error message (if any) and take action accordingly. Possible reasons for a sudden interruption of the acquisition and/or stop of the programme are the following: Copyright © 2009 – 2012 43 enabling organic electronics 1) The lid of Ossila Box is open. As the lid open, the security system interrupts the connection with the PXI. The aperture of the lid and the consequential sudden abrupt variation of the PXI load can force one of the PXI to generate an error which, in turn, stops Ossila FACT1. 2) One or more cables are inadvertently unplugged. Depending on which connection is unplugged, Ossila FACT1 may stop with an error message or acquire the background noise only. Required Action: Refer to the Required Actions for the same issues detailed above. Warning! If Ossila FACT1 stops, but the “Output Enabled” LED of one or both PXI is still ON, you must programmatically shut down the PXI. Run a dummy acquisition (few point for a single device) so that the PXI(s) with Output Enabled active are gracefully and safely switched off. When the “Output Enabled” led is ON, Shock Hazard exists. Ossila Ltd Copyright © 2009 – 2012 44 enabling organic electronics Warranty information and contact details Ossila warrants that: (a) Ossila has (or will have at the relevant time) the right to sell the Products; (b) the Customer shall enjoy quiet possession of the Products, subject to the rights referred to in Clause [8.1(b)]; (c) the Products correspond to any description of the Products supplied by Ossila to the Customer; (d) the Products are of satisFACT1ory quality; (e) the Products are fit for any purpose expressly (but not merely impliedly) made known by the Customer to Ossila before the relevant Contract is made; (f) the Products correspond to any sample of the Products supplied by Ossila to the Customer, and will be free from any defect making their quality unsatisFACT1ory, which would not be apparent on reasonable examination of the sample; (g) the Products will comply with all laws, rules, regulations applicable to the marketing and sale of the Products in United Kingdom. (h) if, within one year of purchase, the customer experiences system failure or damage within reasonable constraints the system may be returned to Ossila for maintenance. Please note that if any system compartment is opened within this period, warranty will be voided. To the best of our knowledge the technical information provided here is accurate. However, Ossila assume no liability for the accuracy of this information. The values provided here are typical at the time of manuFACT1ure and may vary over time and from batch to batch. Ossila Contact Details: Kroto Innovation Centre North Campus Broad Lane Sheffield S3 7HQ UK Technical Contact: Dr James Kingsley [email protected] Customer Services Contact: Lucy Pickford [email protected] Phone no: +44 (0) 114 213 2770 Fax no: +44 (0)800 098 8142 Ossila Ltd Copyright © 2009 – 2012 45 enabling organic electronics List of compatible components Low Density OFET Evaporation Stack The evaporation stack holds the OFET source-drain shadow masks and substrates in close contact for thermal evaporation. For use with the Ossila Low Density OFET sourcedrain evaporation masks (sold separately, please see below). Low Density OFET Source-Drain Shadow Mask Two types of linear source-drain evaporation masks. For use with the low density OFET evaporation stack (above). Low Density OFET Gate Mask An evaporation mask for deposition of gate contacts. For use with the low density OFET system. Low Density OFET Active Area Mask An evaporation mask for deposition on to the active area. For use with the low density OFET system. OFET Gate Mask An evaporation mask for deposition of gate contacts onto Ossila's pre-patterned ITO substrates (S161). Ossila Ltd Copyright © 2009 – 2012 46 enabling organic electronics ITO OFET Substrates Unpatterned ITO substrates. Ideal for spin-coating gate dielectrics on. Compatible when used with the Low Density Fabrication system. Pre-patterned ITO OFET Substrates The Ossila pre-patterned ITO OFET substrates have been designed to enable the fabrication and characterisation of transistors without the need for vacuum evaporations or probe stations. Silicon Oxide OFET Substrates A range of silicon substrates with thermal oxides on. Pre-cut to fit the Ossila OFET fabrication systems but also used for a number of other applications including ellipsometry and X-ray measurements. Compatible when used with the Low Density Fabrication system. Synthetic Quartz Coated Substrates Flat glass substrates coated with 20 nm of SiO2 to help with surface wetting and prevent ion migration from the glass to the active layer. Compatible when used with the Low Density Fabrication system. Ossila Ltd Copyright © 2009 – 2012 47 enabling organic electronics Appendices Ossila Ltd Copyright © 2009 – 2012 48 enabling organic electronics Appendix I Cleaning Routine The starting point for any good organic devices is a pristinely clean substrate. However, physical cleanliness i.e. the absence of dust and particulate matter is often different to a chemically clean surface free from residues and contaminants. To ensure that substrates are pristinely clean we generally start by using a hot Hellmanex III solution which acts as an electronic grade detergent. Keeping the substrates vertical during cleaning also helps to ensure that any particulate matter falls off the substrate. When using Hellmanex III it is also important to use a hot "dump rinse" and an IPA sonication to ensure that no residues are left behind. In addition, we also find that for ITO based substrates it is useful to use a hot sodium hydroxide (NaOH) sonication to provide a more hydrophillic surface and avoid the need for a plasma ash. The below cleaning routine is generally found to provide good surface preparation although exact timings will depend upon the power and temperature of the sonic bath. To achieve hot solutions we generally fill the sonic bath with boiling water from a kettle which results in a bath temperature of around 70 to 80 degrees. 5 mins sonication in hot 1% Hellmanex III solution 2x boiling water "dump rinse" 5 mins sonication in warm IPA 2x cold water dump rinse Optional 5 mins sonication in hot 10% NaOH and 2x cold water dump rinse Storage in cold DI water. Once placed in DI water the substrates are stable for at least 24 hours (and probably much more). Ossila Ltd Copyright © 2009 – 2012 49 enabling organic electronics Appendix II PMMA gate dielectric For top-gate devices the choice of dielectric material is a critical consideration as it must have low leakage and also have an orthogonal solvent to the semiconductor layers below. Solution processed gate dielectrics are therefore an area of active research with many new polymers being developed with the desired properties. However, of the commercially available polymers we have found that PMMA gives the best combination of performance, simplicity and compatibility. However, the molecular weight and solvent used has a large impact on performance. We have found that PMMA with Mw=120K gives good performance when dissolved in butanone. Molecular weights significantly higher than this can cause solubility issues and uneven films while significantly lower can cause pin-holes and solvent incompatibility with solution process gates. While there are many non-polar solvents that will dissolve PMMA very well, these often also dissolve polymeric semiconductor layers. We have therefore found that butanone gives the right combination of solubility for the PMMA with a moderate boiling point ideal for film forming properties and with little effect on most polymeric semiconductors such as P3HT, PBTTT and PCDTBT (it will however still dissolve small molecule materials such as TIPS-pentacene and PCBM). Process routine for PMMA gate dielectric PMMA with Mw=120,000 bought from Sigma Aldrich Dissolved in butanone at 100 mg/ml using stirbar and hotplate set to 80 C Cooled for 10 mins before filtering with 0.45 um PVDF syringe filter Spin coat using a static dispense of 100 ul and fully coat the substrate before spinning Spin speed of 1000 RPM for 30 seconds (fastest acceleration). Bake at 105 C for 5 mins to fully evaporate solvent and take the PMMA to the glass transition temperature to reduce leakage. Solutions stable for at least several weeks. The thickness of the resulting layer should be around 1200 nm and we generally obtain a film uniformity of better than 10%. Ossila Ltd Copyright © 2009 – 2012 50 enabling organic electronics Appendix III PEDOT:PSS Gate Routine The use of a solution processed gate enables rapid fabrication without the use of costly and slow vacuum deposition equipment. However, any solution processed gate also needs to be solvent compatible with the gate-insulator (and preferably organic semiconductor as well). It should also have the right wetting and film forming properties to enable good even substrate coverage. We have found that high conductivity formulations of PEDOT:PSS with additives to control the wetting and drying process give good performance with the below recipe working well. Solution components: Component PH1000 PEDOT:PSS N-Methyl-2-pyrrolidone Triton X-100 Isopropyl Alcohol Order to add 1 2 3 4 % by weight 42.5 2.5 1 54 % Fabrication Routine: Mix the above components in the given order using a magnetic stir-bar but not heated (PEDOT:PSS will phase separate if heated above 40 C). Spin coat using a 50 ul dynamic dispense at 4000 RPM Spin for ~2 mins until fully dry Solutions stable for several days but resistivity increased over time. Using the Ossila ITO OFET substrates this should result in a resistance between the two cathode connection terminals of around 250 Ω. Ossila Ltd Copyright © 2009 – 2012 51 enabling organic electronics Appendix IV OTS Preparation Getting a good OTS preparation on a substrate surface can increase mobilities by orders of magnitude, however getting a good monolayer can be hard to achieve. In general OTS will polymerise over time when exposed to ambient conditions resulting and "stringy" white aggregates in the bottle. As such, we generally store OTS under inert atmosphere (N2 glovebox). However, in order to get a good coating on a substrate, a small amount of water is beneficial for the cross-linking process. For this reason (and also the amount of solvents used) we generally prepare OTS substrates under ambient conditions. The choice of solvent is also critical and we have found cyclohexane to work well using the following procedure. OTS preparation procedure: OTS stored under inert atmosphere (N2 glovebox). Small amount of OTS mixed 1:9 with anhydrous cyclohexane in inert conditions (glovebox). Clean substrates placed in a beaker with lid and immersed in HPLC grade cyclohexane under ambient conditions. OTS:cyclohexane mixture removed from glovebox and small amount added to beaker to produce overall concentration of 1 mMol. Left under ambient conditions for 20 mins. 2x dump rinses in cyclohexane Baked on hotplate under ambient conditions at 150 C The above recipe should result in a water contact angle of around 110 °C or greater. Ossila Ltd Copyright © 2009 – 2012 52 enabling organic electronics Appendix V Note on transient time. If the capacitance and resistivity component of the measurement apparatus and of the DUM (CDUM and Rm) are different from zero, a constant voltage V0 applied at time t=0 will not instantaneously transfer to the DUM, but it will instead be governed by the following equation, , Eq A1 where VDUM(t) is the voltage at the DUM at a time t, with R = Rm + RDUM and C = Cm + CDUM total7 resistance and capacitance of the measurement apparatus and DUM. RC has the unit of measure of time and is usually indicated as the time constant τ of the system (τ = RC). If a voltage V0 is applied at t=0, VDUM(τ)≈0.63 V0. Therefore, for each acquired data point Delay must be 9/10 time larger than the time constant RC. For Ossila FACT1, with two meter-long BNC cable, typical value of resistance and capacitance are R = 1.4 Ω and C = 250 pF, which gives negligible time constant τ. The time constant τ is sometimes more conveniently expresses in term of the cutting off frequency fc, . In addition to the device time constant, the dielectric capacitance charging time and, more importantly, the transistor ON/OFF frequency. While the former time constant is described by EqA1, with fc ranging 1250 KHz for SiO2 to 9 KHz for Al2O3, the latter is given by . Eq A2 In Eq A2, μ is the mobility, VDS the drain voltage and L is the channel length. 7 Here, we assume that the resistance and capacitance elements of both DUM and measurement apparatus are in series and parallel, respectively. Ossila Ltd Copyright © 2009 – 2012 53 enabling organic electronics Appendix V Measurement Flowchart CC: IDS, i(VDS, i) and gate leakage IGS, i(VDS, i) with i =1, 2,...N for j =1, 2...M gate voltage sweep. TC: IDS, k(VGS, k) with k =1, 2,...L for linear and saturation regime VDS,r, r= 1, 2. Initialisation Multiplexer CC? NO Yes CC: Apply VGS,j j =0 TC: Apply VDS,r r =0 j = j+1 Wait t=Gate Delay Wait t=Drain Delay Apply VDS,i i = i+1 Wait t=Drain Delay Acquire IDS,i (VDS,i) NO Apply VGS.k k =0 k =k+1 j =0 Acquire IGS,i (VDS,i) i > N? Wait t=Gate Delay Acquire IDS,k (VGS,k) NO k > L? Yes NO j > M? r = 2? Yes Yes Log CC data Log TC data Yes TC? Yes Next FET? device Next FET? NO device Yes Yes NO STOP Ossila Ltd Copyright © 2009 – 2012 54
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