CHAPTER 5 EXPERIMENTAL RESULTS

87
CHAPTER 5
EXPERIMENTAL RESULTS
5.1
VHDL IMPLEMENTATION OF GA PROCESSOR
The GA processor described in sections 2.6 of this thesis is
implemented using the Xilinx ISE package 8.1. The VHDL coding is used to
describe the different modules of the GA processor and is described in
Appendix-1. The LFSR module described in chapter 2 is implemented and the
12-bit random number is obtained in parallel vector processors represented by
signals s1 to s16. The size of each of the vector processor is 12 bits. The
simulated results are captured using the Modelsim package and are shown
in Figures 5.1 to 5.8 The VHDL code is shown in Appendix-1.
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Figure 5.1 Waveforms of the GA processor captured in
package
Modelsim
89
Figure 5.2 Simulation
showing the vector processor s1 generating
the 12-bit random number
90
Figure 5.3
Simulation showing the vector processor s2 generating
the 12-bit random number
91
Figure 5.4 Simulation
showing
the
the 12-bit random number
vector processor s10 generating
92
Figure 5.5 Simulation showing the vector processor s3 generating
the 12-bit random number
93
Figure 5.6
Simulation showing
the vector processor s4 generating
the 12-bit random number
94
Figure 5.7
Simulation showing
the vector processor s5 generating
the 12-bit random number
95
Figure 5.8
Simulation
showing
the vector processor s6 generating
the 12-bit random number
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5.2
VHDL IMPLEMENTATION OF VRC
Once written in VHDL, the VRC design can be synthesized
and programmed into the FPGA. Use of VHDL allows as much design as
possible to be portable to other synthesis tools, other FPGA cards/ FPGA
architectures.
5.2.1
VHDL Implementation Methodology
Producing a
VHDL
implementation
of
the
VRC involved
several design stages. This section explains these stages and provides an
overview of the design methodology used. The VHDL code implementing
the VRC is shown in Appendix-2 of this thesis.
5.2.1.1
Examination of the image enhancement filter Specification
The first step in the development process was to analyze
thoroughly the input-output specification for the VRC. The basic data
inputs and outputs of the VRC are shown in Table 5.1. This table is concerned
with the information passed to and from the VRC. The specific binary inputs
and outputs used to transmit the information will be covered later.
Table 5.1 VRC Main Data Inputs/Outputs
Main Data Inputs
Input Bits
Description
Totally 72 bits are given as input to the VRC. These
are the bits corresponding to nine 8-bit pixels of the
3x3 window.
Output bits
An 8-bit processed output is given which replaces the
center pixel of the 3x3 window.
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5.3
PERFORMANCE ANALYSIS OF EHW FILTER
Real images are often degraded by some random errors, this
degradation is usually called noise. Noise can occur during image capture,
transmission or processing, and may be dependent on, or independent of,
image content. Noise is usually described by its probabilistic characteristics.
Different noise models that are commonly used are described in section 5.3.1.
5.3.1
Noise Models
5.3.1.1
Multiplicative noise
In this model, the noise magnitude depends on the signal magnitude
itself. An example of multiplicative noise is the degradation of film material
caused by the finite size of silver grains used in photosensitive emulsion.
5.3.1.2
Quantization noise
This occurs when insufficient quantization levels are used, for
example, only 50 levels for a monochromatic image. Due to this noise false
contours appear. However, this noise can be eliminated by simple means.
5.3.1.3
Impulsive noise
When an image is corrupted with individual noisy pixels whose
brightness differs significantly from that of the neighborhood, then it
represents an impulse noise effect.
5.3.1.4
Salt and pepper noise
This describes saturated impulsive noise – an image corrupted with
white and/or black pixels. The effect is more appropriate for binary images.
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5.3.1.5
Gaussian noise
Idealized noise, called white noise or Gaussian noise, has constant
power spectrum, meaning that its intensity does not vary with increasing
frequency. This noise model is often used.
5.3.2
Algorithm to Generate Additive, Zero Mean Gaussian Noise
An algorithm to generate zero mean additive Gaussian noise in an
image is given in this section. The noise is considered additive in the sense
that noise and input image are independent variables.
i)
Select a value for variance of noise σ; low values generate low
noise effect
ii)
If the image gray-level range is [0,G-1], calculate
P[i]=1/ σ
iii)
i=0,1,-----G-1
For each pixel (x,y) of intensity g(x,y), generate a random
number q1 in the range [0,1].
Determine j=argmini(q 1-p[i])
iv)
Generate a random number (sign)q2 from the set [-1,1].
Set f*(x,y)=g(x,y)+q 2j.
v)
vi)
Set
f(x,y) = 0
if f*(x,y) <0
f(x,y) = G-1
if f*(x,y) > G-1
f(x,y) = f*(x,y)
otherwise
(5.1)
Repeat from step 3 till all pixels are scanned
It is to be observed, the truncation eqn. 5.1 will attenuate the
Gaussian nature of the noise and this will become more marked for values of
σ that are high relative to G.
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5.3.3
Comparison Results with Gaussian Filter
In the first phase of this work, simulations were performed using
Gaussian noise distorted bitmaps generated using section 5.3.2. Gaussian
noise is a very good approximation to noise that occurs in many practical
cases. Gaussian noise is considered in accordance with central limit theorem,
which states that, it is possible to represent a mixture of noises with different
probability density function in terms of probability density function of
Gaussian noise.
Filtering operation can be done either with a frequency filter or with
a spatial filter. Generally, a spatial filter is preferable as it is computationally
cheaper than a frequency filter. Bitmap of Lena is used as the target image at
different distortion levels for the generality of the EHW architecture. All
results were compared with the filtered results from the Gaussian filter.
The bitmap images distorted by Gaussian noise with mean 0 and
variance of 0.003, 0.005, 0.006, 0.007, 0.008, 0.009, 0.01 and 0.2 were used
for the testing. Figure 5.9 is the original Lena bitmap of size 128x128. Figure
5.10 is the Lena bitmap distorted by Gaussian noise with mean 0 and variance
0.003. Figure 5.11 is the result from Gaussian filter. Figure 5.12 is the
resulting image of the EHW filter. The Mean Difference per pixel is 135602
for Gaussian filtered image and 127985 for evolvable hardware filtered
image. This establishes the superior performance of the proposed evolvable
hardware based image enhancement filter.
To test the generality of the image filter evolved, various different
image sets are given as input to the evolved filter and the output is verified.
Figure 5.13 is the original Baboon bitmap image of size 128x128. Figure 5.14
is the image distorted by Gaussian noise with mean 0 and variance 0.008.
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Figure 5.15 and Figure 5.16 are the image filtered by Gaussian filter and the
EHW filter respectively. The Mean Difference is 225353 and 215612 for
Figure 5.15 and Figure 5.16 respectively. Another image, Saturn, distorted by
Gaussian noise of variance 0.007 is given as input to the evolved circuit and
the output is verified. Figure 5.17 is the original Saturn bitmap image of size
128x128. Figure 5.18 is the image distorted by Gaussian noise. Figure 5.19
and Figure 5.20 are the image filtered by Gaussian filter and the EHW filter
respectively. The Mean Difference is 157912 for Gaussian filtered image and
100849 for evolvable hardware filtered image. Similar results for different
images are shown in Figures 5.21 to 5.44.
Fig. 5.9
Fig. 5.11
Fig. 5.10
Fig. 5.12
Figure 5.9 Original Lena Image 128x128, Fig. 5.10 Image Distorted by
Gaussian Noise of Mean 0 and Variance 0.003, Fig. 5.11
Image Filtered by Gaussian Filter, Fig. 5.12 Image Filtered
by EHW filter.
101
Fig. 5.13
Fig. 5.15
Fig. 5.14
Fig. 5.16
Figure 5.13 Original Baboon Image 128x128, Fig. 5.14 Image Distorted
by Gaussian Noise of Mean 0 and Variance 0.008, Fig.
5.15 Image Filtered by Gaussian Filter, Fig. 5.16 Image
Filtered by EHW filter.
102
Figure 5.17
Fig.5.17
Fig. 5.18
Fig. 5.19
Fig. 5.20
Original Saturn image 128x128, Fig. 5.18 Image Distorted
by Gaussian Noise of Mean 0 and Variance 0.007, Fig. 5.19
Image Filtered by Gaussian Filter, Fig. 5.20 Image Filtered
by EHW filter.
103
Fig. 5.21
Fig. 5.22
Fig. 5.23
Fig. 5.24
Figure 5.21 Original Chemical Plant image 128x128, Fig. 5.22 Image
Distorted by Gaussian Noise of Mean 0 and Variance
0.006, Fig. 5.23 Image Filtered by Gaussian Filter, Fig.
5.24 Image Filtered by EHW filter.
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Fig. 5.25
Fig. 5.27
Fig. 5.26
Fig. 5.28
Figure 5.25 Original Man image 128x128, Fig. 5.26 Image Distorted by
Gaussian Noise of Mean 0 and Variance 0.009, Fig. 5.27
Image Filtered by Gaussian Filter, Fig. 5.28 Image Filtered
by EHW filter.
105
Figure 5.29
Fig. 5.29
Fig. 5.30
Fig. 5.31
Fig. 5.32
Original Peppers image 128x128, Fig. 5.30 Image Distorted
by Gaussian Noise of Mean 0 and Variance 0.02, Fig. 5.31
Image Filtered by Gaussian Filter, Fig. 5.32 Image Filtered
by EHW filter.
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Fig. 5.33
Fig. 5.35
Figure 5.33
Fig. 5.34
Fig. 5.36
Original Chart image 128x128, Fig. 5.34 Image Distorted
by Gaussian Noise of Mean 0 and Variance 0.008, Fig.
5.35 Image Filtered by Gaussian Filter, Fig. 5.36 Image
Filtered by EHW filter.
107
Figure 5.37
Fig. 5.37
Fig. 5.38
Fig. 5.39
Fig. 5.40
Original Test pattern image 128x128, Fig. 5.38 Image
Distorted by Gaussian Noise of Mean 0 and Variance 0.005,
Fig. 5.39 Image Filtered by Gaussian Filter, Fig. 5.40 Image
Filtered by EHW filter.
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Fig. 5.41
Fig. 5.43
Figure 5.41
Fig. 5.42
Fig. 5.44
Original Moon image 128x128, Fig. 5.42 Image Distorted
by Gaussian Noise of Mean 0 and Variance 0.01, Fig. 5.43
Image Filtered by Gaussian Filter, Fig. 5.44 Image
Filtered by EHW filter.
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5.4
MEAN DIFFERENCE FOR VARIOUS STANDARD TEST
IMAGES
The comparative results of the evolved filter and that of the Gaussian
filter are obtained by measuring the three standard performance measures,
viz., Mean Difference, MSE in dB and PSNR in dB for different images.
These results are tabulated in Tables 5.2, Table 5.3 and Table 5.4 along with
the variance of the noise introduced in each experimental study. From the
tables it is evident that the evolvable hardware filter outperforms Gaussian
filter.
The mean difference per pixel for all the standard test images
presented above is evaluated for both EHW and Gaussian noise and is
tabulated in table 5.2. Lesser the MDPP better is the filtering.
Table 5.2 Comparison of Mean Difference for Various Standard Test
Images
Image
Variance of
noise
Gaussian Filter
EHW Filter
Lena
0.003
135602
127985
Test pattern
0.005
160621
139955
Chemical Plant
0.006
173449
143152
Saturn
0.007
157912
100849
Baboon
0.008
225353
215612
Chart
0.008
198807
100531
Man
0.009
203399
180606
Moon
0.01
217764
143384
Peppers
0.02
295040
237896
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5.5
MEAN SQUARE ERROR FOR VARIOUS STANDARD TEST
IMAGES
The mean square error for all the standard test images presented in
section 5.3 is evaluated for both EHW filter and Gaussian filter and is
tabulated in table 5.3. Lesser the MSE better is the image enhancement.
Table 5.3
Comparison of Mean Square Error (dB) for Various
Standard Test Images
Image
Variance
Gaussian Filter
EHW Filter
Lena
0.003
20.46
20.36
Test pattern
0.005
21.90
21.21
Chemical Plant
0.006
22.44
21.08
Saturn
0.007
22.10
19.42
Baboon
0.008
24.79
24.64
Chart
0.008
24.18
23.55
Man
0.009
23.96
23.14
Moon
0.01
24.41
20.98
Peppers
0.02
27.07
26.08
5.6
PEAK SIGNAL TO NOISE RATIO (PSNR) FOR VARIOUS
STANDARD TEST IMAGES
The PSNR for all the standard test images presented in section 5.3 is
evaluated for both EHW filter and Gaussian filter and is tabulated in
Table 5.4. Higher the PSNR better is the image enhancement.
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Table 5.4 Comparison of PSNR (dB) for Various Standard Test Images
Image
Variance
Gaussian Filter
EHW Filter
Lena
0.003
27.67
27.77
Test pattern
0.005
26.23
26.92
Chemical Plant
0.006
25.69
27.05
Saturn
0.007
26.03
28.71
Baboon
0.008
23.34
23.49
Chart
0.008
23.96
24.58
Man
0.009
24.17
24.99
Moon
0.01
23.72
27.15
Peppers
0.02
21.06
22.05
5.7
SYNTHESIS REPORT
The original and distorted bitmap images are stored in input buffer
initially. It takes 128x128 clock cycles to store each image. At the same time
using random number generator generates 16 initial chromosomes. 16x25x10
clock cycles are needed to generate the initial population. 128x128 clock
cycles are used to evaluate the output for each chromosome. Totally
16x128x128 clock cycles are needed to evaluate the output for all
chromosomes. To select the best chromosome 16 clock cycles are needed. Bit
by bit mutation is used and to generate the new population 15x250 clock
cycles are needed.
The evolved filter is the result of the evolution of an array of 4x6
PEs with one PE at the output. The level back parameter is set as 2. Number
of generations in the GA processor was chosen as 3000. The coding was done
in VHDL using Xilinx Project Navigator and simulations were performed in
112
ModelSim 6. The hardware evolution took 2 minutes on Xilinx Virtex FPGA
xcv800 running at 49 MHz. This compares favorably with software
simulations reported previously which took approximately 6 hours (Pentium
III/800 MHz system) to achieve the best chromosome. Thus, the speed has
been increased by 180 times and the evolution time has been greatly reduced.
This makes the evolved filter highly suited for on-line implementations.
The evolved VRC occupies 1754 slices of the Xilinx Virtex FPGA
xcv800 (9408 slices) and the whole evolvable system including the GA
processor occupies 3204 slices. This amounts to 34% of the resources and
hence chromosomes can be operated in parallel and the processing time can
still be greatly reduced. The synthesis report is given in Table 5.5.
Table 5.5 Synthesis Report - Device Utilization Summary
(Population Size = 16, Chromosome Length = 250)
Target information:
Vendor: Xilinx
Family: VirtexDevice: v800fg680
Speed: -6
Optimization Goal: Speed
Number of Slices
3204 out of 9408
34%
Number of Slice Flip Flops
1087 out of 18816
5%
Number of 4 input LUTs
6200 out of 18816
32%
Number of bonded IOBs
79 out of 516
15%
Number of BRAMs
8 out of
28
28%
Number of GCLKs
1 out of
4
25%
Minimum period
20.160ns
Maximum Frequency
49.603MHz
Minimum input arrival time before clock
27.706ns
Maximum output required time after clock
6.887ns
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5.8
CONCLUSION
The work has presented a novel approach to digital image filter
design based on the technique of evolvable hardware. FPGA model for the
function level evolvable hardware is analyzed and associated with the
evolutionary algorithms employed. The evolution time has been greatly
reduced by implementing the evolutionary algorithm in hardware. The EHW
architecture evolves filters without a priori information and out-performs
conventional filter in terms of computational effort, filtered output signal and
implementation cost.

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