Confidential

Andes Software Solutions for Smart
Connected Devices
智慧連網裝置軟體解決方案
晶心科技張志強
軟體設計部經理
Confidential
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Driving InnovationsTM
Agenda
 Software Solutions for Smart Connected Devices
 AndesZ - ZigBee protocol stack solution
 The best open-sourced toolchain




Advancement in code size
Advancement in performance
Advancement in open source contribution
In the coming BSP toolchain
 Streamlined AndeSight™
 Easy to use for common features
 Comprehensive for advanced features
 In the coming AndeSight™
 Extensive SW Stack
 From bare metal to RTOS/Linux
 Summary
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Driving InnovationsTM
Software Solutions for Smart
Connected Devices
晶心打造品質可靠
WWW.ANDESTECH.COM
WWW.ANDESTECH.COM
AndesZ - ZigBee Protocol Stack Solution
 AndesZ: an implementation of ZigBee stack
 Compliant to ZigBee 2007 and ZigBee PRO standard
 Supports standard security and high security
 High configurability to support various application demands
 Compact code size for cost-sensitive devices
 Uses Contiki RTOS for its OS services
 SoC platform device drivers with AndesZ
 Supports power management
 Netsim Simulator for users to verify ZigBee network topology
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Driving InnovationsTM
Code Size for AndesZ Configurations
Compact AndesCores N7/N8 with V3m ISA
AndesZ
Code Size1 RAM Size2
Configurations
ZED_Min
12.7KB
5.4KB
ZED_NS_2007
22.1KB
5.6KB
ZED_SS_2007
28.1KB
5.7KB
ZED_HS_PRO
30.5KB
5.7KB
ZR_NS_2007
29.1KB
5.9KB
ZR_SS_2007
36.1KB
6.0KB
ZR_HS_PRO
41.6KB
6.1KB
ZC_NS_2007
31.2KB
5.9KB
ZC_SS_2007
38.5KB
6.1KB
ZC_HS_PRO
44.6KB
6.2KB
 32KB ROM and 8KB RAM
 ZED_Min and ZED
 ZR with no security
 64KB ROM and 16KB RAM
 ZC, ZR and ZED without security
 ZC, ZR and ZED with standard security
 ZC, ZR and ZED with high security
ZED_Min skips the following features:




Tree/Mesh routing, multicast and multiple PAN
User packet buffer and description requests
ZDO node and security manager
Complex description response
1. AndesZ ZigBee protocol stack code size is compiled with BSP 3.2.0 mculib-v3m.
2. NS: No Security / SS: Standard Security / HS: High Security
3. Additional memory for stack depends on packet buffer: 1.4KB is needed for 10 entries.
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ZED_Min
Code Size
ZigBee Stack
10.7KB
C Library
0.5KB
Contiki (RTOS)
1.5KB
Total
12.7KB
Driving InnovationsTM
ZigBee Demos with partner’s RF module
 Electronic Tag Demo
 Coordinator sends the image to ZEDs
 ZEDs display it on the electronic tag
 GPIO and LED Demo
 Pushing switch button on ZED
 Coordinator shows GPIO number on LED
ZigBee Nodes in a PAN (Personal Area Network)
•Coordinator
ZC
ZR
ZED
•Router
•Optional
•Several can be in a PAN
•Mains-powered
ZED
ZDO Port
CMD Port
ZED
ZDO Port
ZED
CMD Port
•End Device
CMD Port
•Several can be in a PAN
•Low power
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ZC
ZC
•One per PAN
•Establishes/Organizes a PAN
•Mains-powered
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ZDO Port
Driving InnovationsTM
AndesZ Software Development
AndesZ™ Simulator Program
AndesZ ZigBee Stack
Demo
CLI
/API
AndesCore
Linux/Windows
Platform
AndesZ™ APP Program
Window Platform
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USB Dongle
ZigBee Sniffer Tool
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Driving InnovationsTM
AndesZ Packages for Evaluation
 2 sets of XC5 FPGA demo board
 One set is for ZigBee Coordinator
 The other set is for ZigBee End device
 N801-S netlist is used for demo board
 AndeSight v2.0.1 MCU on Windows with AICE driver
 BSP v321 mculib v3m toolchain for N801-S
 AndesZ BSP package
 AndesZ - Andes optimized ZigBee stack libraries
AndesZ ZigBee stack libraries can be linked with demo programs
 ZigBee device drivers
 Netsim Simulator
 Demo program for AndesCore™ EVB with Ubec’s RF module
 Documentation
 Reference for good understanding of ZigBee programming and
protocol specification
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Driving InnovationsTM
The best open-sourced toolchain
晶心打造品質可靠
WWW.ANDESTECH.COM
WWW.ANDESTECH.COM
Advancement in Compiler Optimizations
 Andes compiler improvement measured by EEMBC:
1.5
1.4
1.3
1.2
1.1
1
0.9
0.8
0.7
0.6
0.5
speed improvement
code size reduction
+50%
-45%
Apr-08
Dec-08
Dec-09 May-10 Dec-10 June-11 June-12 Mar-13 Sept-13
 Overall improvement in 6 years vs. ACompany in 9 years
Speedup: Andes +50% vs. +34%
Code size: Andes -45% vs. -16%
 For MCU benchmarks (V2 as a base):
V3m: > 15% reduction
V3 : > 25% reduction
 20% higher total performance (V2 as a base)
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Driving InnovationsTM
V3/V3m Code Size Comparison
EEMBC Automotive Benchmark
CPUs/ISA
Cortex-M0/ARMv6m
Compiler
Keil
N801/V3m
GCC452
Andes BSP320
 Cortex-M0 vs. N801/V3m
 Keil :
4% > BSP320
 GCC452 : 13% > BSP320
 Cortex-M0 vs. N968/V3
EEMBC Automotive Benchmark
115%
113%
110%
105%
100%
104%
100%
95%
 Keil :
15% > BSP320
 GCC452 : 25% > BSP320
90%
89%
85%
80%
75%
 Note:
70%
M0
/Ke
il
 ARMv6m (M0) is actually ~1.5%
smaller than ARMv7m (M3).
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N968/V3
11
M0
/G
C
C
N8
01
N9
68
Driving InnovationsTM
MCU Benchmarks: N9/N8/N7 vs. M3
 Per-MHz performance comparison:
 N968A is 12.5% faster overall; and 27.8% faster on integer benchmarks.
1. Compiler – AndesCores use BSP320 compiler (GCC 4.4.4). Cortex-M3 uses Keil compiler.
2. Memory latency – Andes runs on FPGA platform with 0-wait cycle SRAM. STM32F2xx includes ART flash accelerator, “an
advanced prefetch queue and branch cache to offer a 0-wait execution from embedded Flash”.
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Driving InnovationsTM
MCU Performance Benchmarks
AndesCore™
CoreMark Comparison
CoreMark/MHz
N705
N801
EN801
CoreMark/MHz
23%> 2.42
10%> 2.33
15%> 2.33
2.97
2.57
2.68
Dhrystone (DMIPS/MHz)
Competitors
Cortex-M0+
Cortex-M0
Cortex-M0
CoreMark(CoreMark/MHz)
2.97
2.42
2.33
1.77
1.71
1.31
M0+
2.68
2.57
1.52
1.21
N705
M0
N801
EN801
1. AndesCores use BSP400 beta for Dhrystone and CoreMark performance benchmarking
2. ARM Cortex-M0 and Cortex-M0+ scores are from ARM official website
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Driving InnovationsTM
Toolchain Open Source Contribution
 Contributing open source tools back to the mainline
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A proof of quality through code review by the global maintainers
GNU coding style must be followed
Pass compiler test suite for quality assurance
More feedbacks and refinements
 Have accepted to Open Source Community
 GCC 4.9
 GCC 4.9 with nds32 port is released in April, 2014
 http://gcc.gnu.org/gcc-4.9/changes.html
 Binutils 2.24
 OpenOCD 0.8
 Newlib 2.1.0
 Have committed to Community Mailing List for review
 GDB 7.8
 Linux Toolchain with glibc library is under planning
 Linux Kernel 3.13 (Linux Kernel 3.14 is the target)
 glibc 2.18 (glibc 2.19 is the target)
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Driving InnovationsTM
In the Coming BSP
 Upgrade to the latest stable versions for
 GCC, Binutils, Newlib, and GDB
 OpenOCD is used for ICE Management Software
 Flash burning performance is improved by 30%
 Download speed is improved by 40%
 Multiple AICE are supported
 Virtual hosting for redirecting I/O to debugger
 More software support for AE210P
 Advanced RTOS Features
 OSC (Overlay SRAM Controller) support
 Copy overlay area to overlay region (SRAM) when overlay interrupt is triggered for
saving on memory costs
 Secure RTOS for SN801
 Secure Privilege Levels (SPLs) are used for security applications
 MPU (Memory Protection Unit) support
 Protect the RTOS kernel from invalid execution and data from corruption
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Driving InnovationsTM
What’s New in GCC
 New Targets and Target Specific Improvements
 A new nds32 port supports the Andes 32-bit architecture
 GCC General optimizer improvements
 Better generic optimization framework
 Better Link-Time Optimization (LTO) support
 LTO (Link Time Optimization) is a GCC feature to provide additional optimization
 Whole program (Multiple files) analysis for code size reduction and performance
improvement
 Code size reduction resulted by LTO can be up to 15% depending on application
 Performance gain resulted by LTO can be up to 10% depending on application
 New -Og optimization level
 Faster compilation, good debugging experience, reasonable speed
 Better than -O0
 More checking and warning
 Support for colorizing diagnostics
 Improved support for ISO C11 and C++11/C++14
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Driving InnovationsTM
Andes DSP library Highlights
 Andes DSP library for MCU applications
 Andes DSP library is a high-performance and small memory
footprint solution
 Get a balance between code size, performance and accuracy
 Data types
 Fixed-point (fractional q7, q15, q31)
 Single precision floating-point (32-bit)
Complete set of DSP algorithms, with examples
 Basic Math (add/sub/mul/abs/scale)
 Complex Math and Matrix
 Filters (iir/fir)
 Transforms (fft/dct)
 Utility (sin/cos/atan/sqrt/log/exp/pow, etc.)
Major enhancements
 Speed enhancement: 20% improvement in average
 Code size enhancement: 15% reduction in average
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Driving InnovationsTM
Streamlined AndeSight™ IDE
晶心打造品質可靠
WWW.ANDESTECH.COM
WWW.ANDESTECH.COM
AndeSight™ : Product Evolution
BSP 4.0
gcc 4.8.2
MCUlib
v2.1
v2.1
BSP 3.0
gcc 4.4.4
MCUlib
BSP 2.0
gcc 3.4.3
v2.0
v2.0
v2.1
v2.0
v1.4
v1.4
Eclipse-based Technologies
Eclipse Platform, C/C++ Development Tooling
(CDT), Eclipse Modeling Framework (EMF),
Graphical Editing Framework (GEF), Utilities, etc.
Confidential
uITRON (uC3)
eCos
FreeRTOS
uC/OS-II
uC/OS-III
ThreadX
Nucleus
Linux kernel 2.6.32
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Contiki
Linux kernel 3.4.x
Driving InnovationsTM
Andes SoC SW Development Environment
AndeSight™ IDE
AndeSight™ IDE
Eclipse-Based GUI
Project Management
Debug Perspective
Profiling Analyzer
Coding
AndeSoft™ Target SW
Compilation
Application Layers
Debugging
Middle ware
Profiling
Device Drivers
App Drivers
Testing
OS/Kernel
Libraries
Customers’
Design
Andes/Partners’
Solution
GNU C/C++ Compiler
MCU/Linux Libraries
Debugger and ICE
Run on EVB
Target
SoC based on AndesCore™
AndESLive™ Virtual SoC
Flash ISP
RTOS Awareness
AndesCore
Run on VEP
Target
MAC
10/100
USB2.0
AHB Bus
LCD
Controller
Customized Chip Profile
SDRAM
Controller
DMA
Controller
SRAM
Controller
AHB to APB
Bridge
PWM
All-C Embedded Demos
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Bus
Controller
AndeShape™
I2C
GPIO
INTC
WDT
Timer
RTC
APB Bus
Power
Manager
ST
UART
BT
UART
SSP
Profiling/Tracing data
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CF
I2S
SD/
MMC
Driving InnovationsTM
AndeSight™: RTOS Awareness Debugging
 Provide RTOS information to help debugging
 Display contents controlled by a Python script
 Support FreeRTOS, ThreadX, μC/OSII, μITRON
 Can be used to monitor bare-metal runtime states too
FreeRTOS
Task List
FreeRTOS
Event List
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Driving InnovationsTM
In the Coming AndeSight™
 Refine STD/MCU/RDS layouts and easier to use
 IDE operations comparison
 Create Project, Import Source, Build, Flash Programming, Debugging
 AndeSight MCU IDE (16 steps)
 AndeSight RDS IDE (9 steps)
 Keil IDE (16 steps)
 Automatically refresh memory via BUS mode
 AICE diagnostic support
 Code coverage at source line level
 EVB board profiling support
 IDE with locale language support
 English, Japanese, Simplified Chinese
 Collect log files and version information for debugging
 IDE, Toolchain, Simulator, ICEman
 Screenshot image file is in .png image format
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Driving InnovationsTM
AndeSight™: More Optimization Levels
 Support -flto option with following BSP400 toolchain
 Support -Og option with following BSP400 toolchain
 Compiler flags for code size
 CFLAGS = -Os -fdata-sections -ffunction-sections -Wl,--gc-sections
 Compiler flags for performance
 CFLAGS = -O3
 More optimization levels for code size
 -Os1: Apply code size optimizations which won’t decrease the performance
 -Os2: Apply more code size optimizations and the performance may drop a little
 -Os3(-Os): Optimize code size most, but performance may drop more
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Driving InnovationsTM
AndeSight™: Code Coverage
 Code Coverage
 Select Code Coverage Option in Build Settings
 Build/Run the program
 Auto Show Code Coverage View
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Driving InnovationsTM
AndeSight™: Target Board Profiling
 EVB Board Profiling
 Profiling by address region
 The address region is from .text section
 Restriction Address check
 0 <= start/end address <=4G
 start address < end address
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Driving InnovationsTM
Extensive SW Stack
From bare metal to RTOS/Linux
晶心打造品質可靠
WWW.ANDESTECH.COM
WWW.ANDESTECH.COM
All-C Embedded Programming with V3
Some CPU-specific features can’t be described by C.
 Usually written in assembly language
 CPU resource management
 System startup code and interrupt handlers (ISR)
All-C Embedded Programming for bare metal program
 Intrinsic functions for CPU resource management
 Function attribute for startup:
 void startup()
NDS32ATTR_RESET();
 Function attribute for ISR:
 void gpio_handler()
 void audio_handler()
NDS32ATTR_ISR( “id=3” );
NDS32ATTR_ISR( “id=0; critical” );
id=N: This function will be invoked when interrupt pin N is raised.
Benefits for users:
 Produce high quality of code (performance and correctness)
 Reduce development time
 Reduce maintenance overhead
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Driving InnovationsTM
AndeSoft™: RTOS Support
 RTOS:
 Commercial: ThreadX, μC/OS-II , μC/OS-III, μC3/μITRON, Nucleus
 Open Source: FreeRTOS, eCos, Contiki
Application
 RTOS Middleware:

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

Middleware
File System (FAT32) Stack
USB HID and MSD Stack
lwIP TCP/IP Stack
Andes ZigBee Stack
MP3
JPG
USB
LWIP
ZigBee
RTOS
Development tools:




FS
Strong GNU compiler
Eclipse-based IDE
Andes ICE for RTOS debugging
RTOS awareness debugging
UART
Device Drivers
Timer
INTC
LCD
SD
MAC
GPIO
AC97
SPI
I2C
USB
DMA
Task
MM
Mutex
Semaphore
EVENT
ISR
IPC
Mailbox
Andes Platform
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Driving InnovationsTM
AndeSoft™: Linux Support
 Linux:




Long-term-support kernels: 2.6.32, 3.4.35
U-Boot for starting up
Drivers for all devices in our EVB
OpenWrt package for networking
 Development tools:
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


Strong GNU compiler
Eclipse-based IDE
Andes ICE for kernel debugging
Gdbserver for APP debugging
Strace for system calls tracing
Oprofile profiling tool
EVB development platform
Linux awareness debugging support
Calling Stack
Memory View
from CPU/BUS
SoC register View
Source-level
View
CPU register View
Assembly View
 J&D CodeViser with Andes V3 support
 LauterBach Trace32 with Andes V3 support
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Driving InnovationsTM
Summary
 Software systems for Smart Connected Devices such
as IoT and Wearable devices are getting more and
more complicated
 Andes solutions for Smart Connected Devices




AndesZ BSP for ZigBee protocol stack solution for IoT
AndeSight for use with ease
Toolchain for good code density and high performance
Software development platform support for AndesCore™ and
AE210P
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Driving InnovationsTM
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Driving InnovationsTM

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