Aki Saari Curriculum Vitae

Aki Saari
Curriculum Vitae
M.Sc Electrical Engineering
Molskitie 12, 90830 Haukipudas, Finland
+358 405430259
[email protected]
Date of Birth: 14th Sep, 1977
http://www.linkedin.com/pub/aki-saari/2/697/718
General
summary
Hard working individual HW Expert with strong technical background and good networking
& social skills on global environment.
14 years wide experience on mobile Baseband HW chipset side including the final products
development.
Chipset projects both with SoC’s around the in-house modem (GSM, WCDMA, LTE) &
commercial IC’s has given in-depth knowledge for different HW solutions & System Level
Design.
Signal & Power Integrity (SIPI) expertise area in all aspect of SIPI on package, PCB and
System level. Developed significantly SIPI whole HW design flow viewpoint last 9 years.
Analytic touch for problem solving and integration of High Speed IF’s, Powering solutions
and EMC topics.
Capability to combine small details to the big picture and attitude for continuous learning.
Special Interest
HW Integration & verification, BBHW, System Design, High Speed IF’s, Signal & Power
Integrity, EMC, Memories, UI-HW, Power Management
Key
competencies
Baseband HW
 Digital & Analog specification, integration &
verification
 High Speed IF’s deep knowledge
 System Design; clocking, IF’s, powering
 SMPS & LDO’s & Power Management
 Memories & UI-HW
 SW/HW integration & debugging
 CPU´s/MCU’s & trace/debugger systems
 Product development & concepting
 Automated Test Environment
 Circuit level design
Project work/coordination
 Own technical area planning & reporting &
coordination
 International multisite projects
 Co-operation with international vendors
 Virtual Experts teams & Debug Task Force
groups (HW & SW)
 Customer support globally
Signal & Power Integrity & EMC
 Effective using of different simulation
tools & modeling solutions
 Co-design for die, package & board;
signals & powers
 CPU Voltage budget & Stress SW’s &
Thermal
 PCB guideline/rules definition & layout
optimization/review
 BB EMC, EMI, ESD
 IF’s filtering & component optimization
 Coaching other HW engineers &
lectures in-house & vendors side
 Advanced skills for measurements &
equipment’s
IC design
 VHDL design, state machines, CTRL IF’s
 IO design & requirement specifications
 Characterization & results review
R&D tools
SIPI & EMC: Mentor ICX & Hyperlynx, Sigrity/Cadence PI tools, Ansys Siwave, Agilent ADS, CST
PCB layout & schema: Zuken CR5000, Mentor Boardstation, Cadence Allegro
IC:
Mentor ModelSIM and SPICE tools
Modeling languages/tools: HSPICE, IBIS, S-param, CPM, VHDL, Matlab, Labview,
SW:
Python basics, scripting
Education
Master of Science: Oulu University Department of Electrical Engineering 1996-2003
Major: Electronic (Analog, Digital & RF)
Thesis: Mixed-Signal Boundary-Scan test environment
Work
Experience
Oct 2013->
Sep 2014
Oulu site closed
Nov 2011->
Sep 2013
Senior Staff Engineer, HW: BROADCOM: Mobile Platforms, BBHW
Signal & Power Integrity responsible for LTE Modem Platform Baseband. Several different type
RD phase HW’s for SoC validation, bring-up, SW/HW integration and power optimization which
CLK & High Speed IF’s, debug-IF’s & power supplies performance & quality I optimized.
General HW study, design & verification tasks. Close co-operation with SoC, packaging, system
& verification teams and customer support to Korea & China.
Specialist: Signal & Power Integrity: RENESAS MOBILE Europe: Wireless Modem
Mobile Platform BB Signal & Power Integrity responsible. 2 chipset project with integrated APE
& LTE Modem processor & shared 3rd party PMU to BB & RF. Own expertise area handling
starting from system design co-operation, powering solutions, IC’s ball out, co-design
simulations, PCB layout & schemas optimization and guidelines definition, HW/SW integration
& verification until to customer support.
Significant task has been CPU Power Integrity and co-design with SOC & PMU including the
Voltage budget optimization & verification with Stress SW’s and also the thermal viewpoint.
Close co-operation with RFIC & RFHW cause shared PMU solution & RFBB-IF development.
Renesas Mobile side lead SIPI Engineer and parallel with HW project work supported
architecture and power management activities and different technology area topics.
NOKIA
corporation
Senior Specialist: Signal & Power Integrity & EMC: Technology Platforms, Chipset Core HW
Mobile
March 2005->
Nov 2011
Baseband HW Platform SIPI and later also BB EMC responsibility. Chipset projects both with
custom IC’s and commercial solutions from High End to mid/low cost (Symbian, Meego, S40).
I was 1st SIPI Engineer on Chipset HW side and recognized final product side EMC & SIPI
problems which can be minimize with correct Chipset design & relevant guiding.
Included Signal Integrity issues for correct phases of HW design process, rising up Power
Integrity activities and defined SIPI & EMC requirement specifications to IC supplier’s direction.
Trained several HW Engineers to SIPI topics & also lectures to suppliers side & active member
of different global Expert Forums.
Supported several other chipset & product programs on SIPI & EMC area cases.
Parallel with own SIPI area topics I have conduct HW project general study, design &
verification tasks digital & analog baseband, memories and common HW components area.
Dec 2000 ->
Feb 2005
May-Aug 2000
Design Engineer: ASIC: Technology Platform, Wireless Platforms, Mixed Signal IC
Digital logic design with VHDL, control IF’s & state machines for MS-IC 2003-05
Thesis work 2002-2003: embedded built-in self-test structure, analog JTAG
Test Engineer/Trainee on MSIC lab 2000-2002: MSIC characterization,
Automated Test Environment development topics & Labview Test SW coding
All Oulu, Finland
Languages
Other
Civil Status
Senior Engineer,BBHW 2009; Senior Design Engineer, HW 2006, Design Engineer, HW 2005
Finnish: Mother language
English: fluent; written & spoken
Swedish: Satisfactory
Married, 2 daughters 4 & 7 years
Hobbies
Cycling: road & mountain
Cross-country skiing, running
Construction work around the own house &
yard
Military Service
1997-1998 Kainuu Brigade, artillery regiment; Rank: lieutenant
References
more on request
Petri Käkelä, BB Project Manager
Broadcom, Oulu, Finland
Phone: +358405654579
[email protected]
Petri has been my project manager 2005-14. He
has seen my individual style of work & effective
output on different environments
Maria Herajärvi: HW Program Manager
Broadcom, Oulu, Finland
Phone: +358 505401671
[email protected]
Maria was my HW Program & Integration
manager & Broadcom and Renesas times