PID lead-lag controller design for second order integrating unstable

International Journal of Advances in Electrical and Electronics Engineering
01
Available online at www.ijaeee.com & www.sestindia.org/volume-ijaeee
ISSN: 2319-1112
PID lead-lag controller design for second order
integrating unstable process
V. K. Singh
email: [email protected]
Department of Electronics & Communication Engineering
B.T.K.I.T, Dwarahat -263653, Almora, (U. k.)
ABSTRACT- PID Lead-lag tuning formulas are derived for integrating unstable processes based on proposed modified Internal
Model Control (IMC) structure. The structure extends the standard Internal Model Control structure for stable processes to
unstable processes. To achieve better output response, even in the presence of load disturbance a second order low pass filter is
inserted in the loop to reduced mismatch between process and model. An advantage of the structure is that set-point tracking
and disturbance rejection can be easily done. Denoising methods are presented to cope with measurement noise, a first order low
pass filter is inserted in the loop to denoise the output signal.
Keywords: Internal Model Control, Measurement noise, Load disturbance.
I. INTRODUCTION
Time-delayed integrating unstable processes are commonly encountered in process industries and are difficult to control
due to right-half plane (RHP) poles. A time delay is introduced into the transfer function description of such system due to
the measurement delay or an actuator delay or by the approximation of higher dynamics of the system by that of a lower
order plus delay systems. Stabilization and control of integrating unstable process with time-delay are one of the most
challenging tasks in the industry. The closed loop response for integrating unstable processes shows a large overshoot and
settling time, compared with that of stable processes. Clearly, the tuning of controllers to stabilize integrating unstable
processes and impart adequate disturbance rejection is critical. The difficulties are mostly due to the integrating unstable
nature of the dynamics, for which most design tools cannot be used. The objectives for controlling an unstable process
should include: stabilizing the unstable pole, achieving good performance in servo-tracking and disturbance rejection.
Lee et al. [1] discussed how to use series expansion to approximate the final controller with a PID structure. Unfortunately
there is no systematic approach to find the approximation, and it cannot retain the IMC structure and also a set point filter
is used in their method to reduce the overshoot which increases the number of design parameter. Tan method [2] had
shown the best superiority by using the simulation examples, and Yang [3] pointed out that executable high order
controllers could result in much better system performance and robustness in comparison with conventional PID
controllers, which were suggested to be figured out by using the numerical recursive-least-square (RLS) algorithm. In
addition, two-degree-of-freedom control methods based on the Smith-predictor (SP) [4-7] had been proposed by and really
achieved smoothly nominal set-point response without overshoot for first order unstable processes with time delay. This
paper describes PID Lead-lag controller designed based on IMC principle this give better disturbance rejection and set
point tracking in the presence of measurement noise, Denoising methods are presented to cope with measurement noise, a
first order low pass filter is inserted in the loop to denoise the output signal
II. MODIFIED IMC CONTROLLER
This section describes IMC principle. The proposed modified IMC structure is shown in Fig.1. As per principle the
following condition should be satisfy for the internal stabilization of closed loop system.
ISSN: 2319-1112 /V3N1:01-07 ©IJAEEE
IJAEEE ,Volume 3 , Number 1
V. K. Singh
(1) GIMC stable.
(2) GIMCGP stable.
(3) (1 - GIMC GP) GP stable.
Fig. 1. Modified IMC structure
Fig. 1.1 Modified IMC structure
The process model Gm is separated into the invertible or delay free part GI and non invertible or delay part GNI,
Gm(s) = GI(s)*GNI(s). As per modified structure GI combined with LPF is represented as PI and GNI similar as PNI (Fig.1.1.)
PI = GI*
1
( βs + 1)
PNI = GNI
ISSN: 2319-1112 /V3N1:01-07 ©IJAEEE
(1)
3
PID lead-lag controller design for second order integrating unstable process
III. UNSTABLE PROCESS MODEL WITH INTEGRATING PLANT
Let the transfer function of the integrating process model be
K P e −θs
Gm(s) =
s (Ts − 1)
(2)
First part of IMC controller design is to factor the process model into invertible and non-invertible component
KP
s (Ts − 1)
GI(s) =
GNI = e
−θ s
(3)
Then modified invertible and non-invertible term is:
Kp
( βs + 1)[s(Ts - 1)]
PI(s) =
PNI(s) = GNI = e
−θ s
(4)
IMC filter structure is chosen as values of α2 and α1 is selected to cancel out the pole. This requires
f(s) =
α 2 s 2 + α1s + 1
(λs + 1) 4
GIMC(s) = PI
−1
(5)
[s(Ts − 1)(α 2 s 2 + α1 s + 1)(βs + 1)]
(s)*f(s) =
K P (λs + 1) 4
(6)
where α1 and α2 are determined by the two asymptotic tracking constraints
−θS
(α 2 s 2 + α1s + 1)(βs + 1) e
d
[1 −
] Lim s→0 = 0
ds
(λs + 1) 4
(7)
−θS
[1 −
(α 2s 2 + α1s + 1)(βs + 1) e
(λs + 1) 4
] Lim s→1/T = 0
(8)
The value of α1 and α2 are obtained after simplification and given below
α1 = 4λ + θ –β
(
λ
α 2 = [T 2 { T
(
(9)
θ
+ 1) 4 e T
β
T
+ 1)
−
α1
T
− 1}]
ISSN: 2319-1112 /V3N1:01-07 ©IJAEEE
(10)
IJAEEE ,Volume 3 , Number 1
V. K. Singh
IV. PID LEAD-LAG CONTROLLER DESIGN
Let the configuration of the controller be
CPID(s) = KC (1+Td s+1/TI *s)
(1 + as)
(1 + 0.1as)
(11)
PID lead-lag Tuning formula given by singh et al. [5]
KC =
α1
K P (θ + 4λ − α 1 )
(12)
TI =
α1
(13)
Td =
α2
α1
(14)
a = (β+θ/2)
(15)
The main aim of the lead compensator is to increases the resonant frequency, which results in increasing the upper bound
of frequency in the low frequency region. On the basis of extensive simulation study conducted on different second-order
unstable processes, the use of 0.1a instead of another parameter ensures robust control performance. That assumption
reduced number of parameter of PID with series Lead-lag filter.
For PID tuning parameters value we just little modify our integrating plant in the form of
Gm(s) =
Kpe −θs
( s − .01)(Ts − 1)
(16)
PID parameter value with series lead-lag filter can be obtained with the help of eq (12) - (15). Note that all of the above
proposed PID and high order approximation controllers for the ideally desired disturbance estimator are actually tuned by
the single adjustable parameter λ which is explicitly present in the ideally desired disturbance estimator. Obviously owing
to better approximation for the ideally desired disturbance estimator, a high order approximation controller is capable of
achieving better closed-loop performance for the load disturbance rejection compared with a conventional PID controller
obtained from the Maclaurin approximation or a low order approximation controller. Hence it depends on the user choice
of the compromise between the achievable load disturbance rejection performance and the complexity of the controller
approximation form. It should be noted that the proposed high order approximation controller for the ideally desired
disturbance estimator can be practically and conveniently implemented in an advanced electrical instrument such as a
direct-digital-controller (DDC) or an industrial processing computer.
ISSN: 2319-1112 /V3N1:01-07 ©IJAEEE
5
PID lead-lag controller design for second order integrating unstable process
For the disturbance estimator, λ is the only user-defined parameter and is directly related to the performance and
robustness of the system. Therefore, λ guidelines are also essential for achieving fast and robust response. A small value of
λ is favored for a small peak and fast response while a large value of λ for robust and stable response. The starting value of
λ is recommended to be set as the process time delay for robust response. There after value at λ can be independently
adjusted on- line until the desired trade-off between the nominal and robust performance is achieved.
V. Measurement Noise (Selection of β)
Measurement noise is normally in the high frequency range of signal spectrum and is a common problem during the
process identification. Therefore, a low pass filter that filters out all frequencies much higher than the critical frequency is
inserted in the loop. Low pass filter time constant β can be calculated [6] with the help of bode plot, However critical
frequency of process.
VI. Simulation and Result
One example is presented in this section to illustrate the methodology discussed in the preceding section. Also, the method
proposed by Lee et al. [1] has been considered here for comparison of results. Their methods do not deal with measurement
noise during in controller design. In this paper, the effect of measurement noise is investigated in simulations by
introducing normally distributed random additive noise with zero mean and varying N (0,
), at the Output during the
controller design thus making the process output noisy.
Example. Consider the integrating and unstable process studied by Lee et al. [1].
GP =
e −0.2 s
s ( s − 1)
In Lee method, the tuning parameters of the primary PID controller in the closed-loop were taken as KC = 0.8412, TI =
3.3066, Td = 2.8113, and the set-point filter was chosen as fr = 1/ (8.4593s2 + 3.3607s + 1). In our proposed method values
of PID with series lead-lag filter parameters are:
KC = 1.055
a = 0.1319
TI = 3.3681
0.1a = 0.01319
Td = 2.3922
β = 0.0319
For performance comparison, 0.5 magnitude step change to the set-point input at t = 20 is added. An additive random noise
N
(having SNR=20dB) is introduced at the process output during simulation.
ISSN: 2319-1112 /V3N1:01-07 ©IJAEEE
IJAEEE ,Volume 3 , Number 1
V. K. Singh
Fig. 2. Response of example (with measurement noise)
Fig.2.1. Response of example (without measurement noise)
ISSN: 2319-1112 /V3N1:01-07 ©IJAEEE
7
PID lead-lag controller design for second order integrating unstable process
It is clear from Fig.2. that the closed loop output response by Lee et al. Show noisy closed loop output response compared
with our proposed modified IMC structure based PID Lead-lag controller response. Also load disturbance rejection by their
method is not satisfactory. However, the proposed controller setting in presence of measurement noise show faster and well
damped response in comparison to Lee et al. method.
VII. CONCLUSION
The proposed method ensures a de-noised process output even in the presence of measurement noise. A PID controller
with series lead-lag filter designed in terms of process model parameter and low pass filter time constant β and closed loop
time constant λ from the IMC structure. The controllers perform well for load disturbance rejection. The simulation result
show that the proposed method gives improved result as compared to some previous work on PID control.
REFREENCES
[1] Y. Lee, J. Lee, S. Park, PID controller tuning for integrating and unstable processes with time delay, Chem Eng Sci.
55 (2000) 3481-93.
[2]
K.K. Tan, T.H. Lee, X. Jiang, Robust on-line relay automatic tuning of PID control system, ISA Transactions 39
(2000) 219.
[3]
X.P. Yang, Q.G. Wang, C.C. Hang, C. Lin, IMC-based control system design for
unstable processes, Ind.
Eng.
Chem. Res. 41 (17) (2002) 4288–4294.
[4]
T. Liu, W. Zhang, D. Gu, Analytical design of two-degree-of-freedom control scheme for open-loop unstable
process with time delay, J. Process Control 15 (2005) 559–572.
[5] V. K. Singh, P. K. Padhy, Measurement noise and disturbance rejection for unstable SOPDT process, ICPCES(2010).
[6]
P.K Padhy, S. Majhi, IMC based PID controller for FOPDT stable and unstable processes, Proc. of 30th National
System Conference, Dona Paula, Goa (2006).
[7]
M.Shamsuzzoha, Moonyong Lee, Enhanced disturbance rejection for open –loop unstable process with time delay,
ISA Transaction 48(2009) 237-244.
ISSN: 2319-1112 /V3N1:01-07 ©IJAEEE

Download Report