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COMPUTER ORGANISATION AND ARCHITECTURE
Important Questions On Unit I
Q A a) Explain the operation of sequential circuit binary multiplier with
Multiplicand 1101
Multiplier 1011.
b) Using Booth’s algorithm multiply
Multiplicand = – 13
Multiplier = + 11
Q A a) Explain following addressing modes with example
1) Indirect mode
2) Index mode
3) Relative mode.
b) Carry out bit pair recoding of following multipliers
11010
01101
c) Represent (178.1875) in single precision floating point format.
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Q A a) Perform the following division using restoring and nonrestoring division algorithm.
Dividend = 1100
Divisor = 0011
b) Explain IEEE single precision and double precision floating point number format.
Q A a) Explain performance parameters of processor.
b) Explain functional units of computer.
c) Draw & explain the Von Neumann architecture.
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Q A a) Explain following addressing modes with suitable example.
i) Direct addressing mode.
ii) Indirect addressing mode.
iii) Base Index addressing mode.
iv) Branch addressing mode.
b) Describe IEEE standard for single precision & double precision floating point numbers.
c) Draw & Explain Von Neumann Machine.
Q Aa) Perform following division using restoring & non - restoring algorithm.
Dividend = 1010 & Divisor = 0011
b) Explain functional units of computer.
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A )Perform division of the following numbers using restoring and non restoring division algorithm.
A: 1100 and B: 0100
B )Write the help of flow chart explain floating point multiplication operation.
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A) Multiply (-7) and (+3) using Booth’s algorithm. Register size is 5 bits.
B) Represent the following numbers in single precision format
(42.625)
C) A Draw and explain Basic structure of CPU
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Important Questions On Unit II
October-11
a) Explain with neat block diagram single bus organization.
b) Using input output gating for the registers in single bus organization explain operation of
1) Fetching a word from memory
2) Storing a word in memory.
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a) Draw neat block diagram of three bus organization of data path inside the processor and hence explain the
control sequence for instruction Add R4, R5, R6.
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b) What is microprogrammed control ? Using single bus organization write control sequence for execution
of instruction Add (R3), R1. Write microinstructions for the same.
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a) Draw & explain the single bus organization.
b) Write the control sequence for an unconditional branch instruction.
c) Differentiate between Hardwired & Microprogrammed control.
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a) Write control sequence for execution of the instruction SUB(R4), R2 using single bus organization. 8
b) Explain the steps involved in fetching a word from memory.
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a) Draw & explain multiple bus organization of processor unit with neat diagram.
b) Describe in brief any two methods of hardwired control unit design.
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a) Write the control sequence for execution of instruction ADD R4, R5, R6 using single bus organization
with flow chart.
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b) Explain w.r.to micro - programmed control unit :
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i) Microinstruction format.
ii) Microinstruction sequencing & encoding.
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A. Write control sequence for the execution of following
B. Draw and explain hardwired control unit
C. Draw and explain multiple bus organization of CPU.
instruction. SUB R4, R6
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A. Draw and explain organization of single bus CPU with control signals.
B. Draw and explain micro programmed control unit.
C. Write sequence of control signals for memory read and memory write operations.
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Important Questions On Unit III
October-11
a) Explain how multiple interrupt requests can be handled using
1) Vectored Interrupt
2) Using individual interrupt request and acknowledge lines.
b) Explain use of PCI bus in computer system. Also explain data transfer signals on PCI bus.
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a) Write notes on: 1) USB
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2) Cache Memory.
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a) Write short notes on (Any two) :
i) PCI.
ii) SCSI
b) Explain the concept of cache memory.
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iii) USB
a) Draw and explain interface between printer and processor.
b) Explain the different methods to handle multiple interrupt requests.
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Q. A a) Explain with neat diagram interface between printer and processor, Also explain communication
between them.
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b) Discuss with suitable diagram programmed I/O & interrupt driven I/O.
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Q. A Write short notes on :
a) Cache memory.
b) USB Bus
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c) PCI Bus
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A. Draw and explain USB signals for USB communication. Explain bus protocol and four types of data
transfer for USB
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B. Differentiate memory mapped I/O and I/O mapped I/O.
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C. A Write short note on cache organization.
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A Draw and explain construction of static and dynamic RAM.
B Compare programmed and interrupt driven I/O.
C Explain any two DMA data transfer modes.
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Important Questions On Unit IV
October-11
a) Explain 8086 architecture.
b) With suitable example explain difference between rotate and shift instructions.
c) Explain with suitable example how physical address of operand is calculated in 8086.
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a) Explain interrupt vector table of 8086.
b) Explain string instructions of 8086.
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a) With a neat diagram explain the architecture of 8086 processor.
b) Describe the interrupt structure of 8086.
c) Explain Based indexed addressing mode of 8086.
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a) Write an 8086 assembly language program for BCD to seven segment code conversion. Use XLAT
instruction and common cathode display.
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b) Explain the following instructions of 8086 with suitable example.
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i) TEST.
ii) LOCK.
iii) LAHF.
iv) AAA.
v) CLD.
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a) Explain with neat diagram architecture of 8086 microprocessor.
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b) Write ALP to find largest number in array of 8-bit numbers. Array starts from memory location 3000 :
1000 to 3000 : 1009. Store result at 4000 : 1000.
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a) State difference between software & hardware interrupt. Give example of each. Also explain action taken
by processor to service these interrupts.
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b) Explain functions of following pins of microprocessor 8086.
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i) NMI
ii) BHE/S7
iii) TEST
iv) LOCK
v) READY
vi) MN/MX
vii) ALE
viii) M/IO
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A. Write an assembly language program for 8086 to calculate how many times character ‘A’ appears in
string. Store result in data segment 8
B. Draw a bit pattern of flag register and explain significance of each bit. 8
A . Draw interrupt vector table of 8086 and explain dedicated interrupts.
B.Explain following instructions of 8086.
i) PUSHF
ii) XLAT
iii) far CALL iv) AAM
Important Quetions On Unit V
October-11
a) Explain flag register of 80386.
b) Explain memory paging mechanism in 80386.
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a) Explain segment descriptor in detail.
b) Explain the use of various registers in 80386.
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a) Draw & explain the register model of 80386.
b) Explain real mode of 80386.
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Q10) a) Explain protection mechanism in 80386. How to change privilege level in 80386.
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b) Explain with neat diagram addressing mechanism for paging giving details of page table and page
directory.
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a) Explain with neat diagram register model of 80386 microprocessor in protected mode.
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b) What is paging? How 80386 MMU performs linear to physical address translation with the help of page
directory, page table & page frame.
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A) Describe w.r.to to 80386 :
a) Describe TSS & its role in multitasking.
b) What is segment selector? Explain selector format in detail.
c) Draw & Explain flag register.
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A. With the help of diagram explain address calculation in protected mode of 80386, when paging is enabled
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B. Explain real mode of 80836
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A.With the help of diagram explain task switch operation without task gate in 80386.
B.Draw and explain format of non system segment descriptor.
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Important Questions On Unit VI
October-11
a) What is the difference between loosely coupled and tightly coupled multiprocessor system ?
b) Compare RISC and CISC.
c) Explain pipelining mechanism of RISC processor.
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a) List and explain various registers in ARM core. What are different modes of operation in ARM ?
b) Explain superscalar processor architectures.
c) Explain role of Barrel shifter in ARM core data flow model.
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a) Explain properties of RISC architecture.
b) Describe register model of ARM processor.
c) What do you mean by superscalar processor.
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a) Give classification of various computer architectures and explain each.
b) What are the difficulties in instruction pipelining.
c) What is the role of CPSR in ARM processor.
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a) Draw & explain ARM core data flow model.
b) Describe in brief different processor modes of ARM core.
c) Draw & Explain CPSR register of ARM core.
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a) Compare RISC & CISC processor.
b) Write short note on:
i) Tightly coupled multiprocessor system.
ii) Loosely coupled multiprocessor system.
c) Describe in brief super scalar & super pipelining.
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A. Draw and explain ARM core data flow model.
B. Draw and explain Flynn’s classification of various computer architecture
A. Write short note on
Instruction pipelining, Superscalar processors
B. Differentiate followings
i) RISC and CISC
ii) Loosely Coupled and Tightly Coupled
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