Ankündigung - Integrated Systems Laboratory

Institut f¨
ur Integrierte Systeme
Integrated Systems Laboratory
Analog Integrated Circuits
(The lectures and the exercises are given in English)
Department of Information Technology and Electrical Engineering (D-ITET),
5. and 7. Semester
Prof. Dr. Q. Huang
Autumn term 2014
Lectures: ETZ E6
Friday 10:15 – 11:55
Exercises: ETZ E6 & D61.1 Friday 13:00 – 15:00
Philipp Sch¨
onle
ETZ J64.2 254 99
([email protected])
Assistants:
Thomas Kleier
ETZ J61
252 44
Luca Bettini
ETZ J93
260 90
Petrit Bunjaku
ETZ J64.2 260 92
Xu Han
ETZ J64.2 271 58
Danny Luu
ETZ J61
279 86
The attendance at the exercises is highly recommended, however not mandatory for the admittance to the exam. They are indeed essential for the understanding and provide valuable
insight into the analog circuits design-flow.
Coordination:
Since the nineteen-seventies the advantages of digital circuits have led to predictions that everything
would become digital. Such predictions appear to become reality today since the most important applications, such as telephony, mobile communications and high definition television adopt a digital approach.
This leaves the impression that digital circuits will simply replace analog circuits until the latter will
totally disappear from the electronic systems we use. In reality, the pervasiveness of digital circuits has
increased the importance of analog circuits for the simple reason that most digital systems need analog
circuits to interface with the real world which is analog. Analog circuits, instead of disappearing, have
expanded with digital circuits into new applications. Although analog circuits often occupy only a small
fraction of the total area of an integrated circuit, their performance is critical in deciding the overall
performance of the system. Analog integrated circuit design is therefore among the most sought after
skills by the integrated circuit (IC) industry.
This course provides a foundation in the analysis and design of most commonly used analog integrated
circuits in both bipolar and CMOS technologies.
Date
Lecture Topic
19. 9.
Introduction and background, review of BJTs and MOSFETs
Device Characteristics. Large and small signal models,
short-channel effects, passive components
Analog Sub-circuits. Current sources and mirrors,
active loads, supply independent biasing, voltage
references
Basic Amplifiers. Common-source, source-follower and
common-gate amplifiers
Amplifiers. Differential input stage, cascode amplifier
high gain structures, output stages
Two Stage Amplifier.
Miller Op-Amp
Fully Differential OTAs. Gain bandwidth
product, stability, phase and amplitude margin
Fully Differential OTAs.
Regulated cascode, common-mode feedback
Comparators.
26. 9.
03. 10.
10. 10.
17. 10.
24. 10.
31. 10.
07. 11.
14. 11.
21. 11.
28. 11.
05. 12.
12. 12.
19. 12.
Exercise Topic
Second-Order Effects. Mismatch of geometrical and
electrical parameters, offset, clock feed-through, noise
Switched-Capacitor Filter. SC integrator, op-amp
requirements, settling, slewing
A/D and D/A Converters. Characterization, integrating converters, successive approximation A/D converters
Sigma-Delta Analog-to-Digital (A/D) converters and design
example
Revision
Exercise
Hand out
Date
Assistance
Hand in
1
2
3
4
5
19.9.
10.10.
24.10.
07.11.
21.11.
special
10.10. / 17.10.
24.10. / 31.10.
07.11. / 14.11.
21.11. / 28.11.
6
05.12.
05.12. / 12.12.
1: Op-amp characterization
2: Introduction to Cadence
3: Analog subcircuits
4: Common-source and
differential amplifiers
5: Design of a single
stage op-amp
6: Layout
Place
Assistants
-
ETZ J65
ETZ D61.1
ETZ E6 / D61.1
ETZ E6 / D61.1
ETZ E6 / D61.1
-
ETZ E6 / D61.1
Kleier, Sch¨
onle
Bettini, Han (Bunjaku)
Bunjaku, Luu, (Han)
Luu, Han, (Bunjaku)
Bettini,
Bunjaku,
(Sch¨
onle)
Luu, Han, (Bettini)
Some of the exercises are done using Cadence. We provide accounts on our filesystem during the course.
Do not put personal material on these accounts! — Do not change the accounts’ passwords!
The accounts will be removed at the end of the course.

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