Case-1 - TI E2E Community

Case-1
Vt- = 0.6V min, 1.3V max
VB=24V
Vcc=3.3V
SW
OFF
ON
OFF
Vi
R1
SW
Vo
74LVC2G14-Q1
0.6V(Vt- min)
V1
t1
TPS7B6933-Q1
Case-2
VB=24V
VIL=0.8V max
Vcc=3.3V
SW
OFF
ON
OFF
Vi
SW
1D
ｖ
R2
Vo
0.8V(VIL max)
74LVC374A-Q1
TPS7B6933-Q1
t2
V2
VB(6V～24V)
回路-2 SWが上側
SW OFF、CLK 1=1kHz、CLK 2=Lowの状態でVB消費電流が100uA以下（目標）
⑥ ×TPS70933-Q1 $0.46, Ignd=2.55uA @Io=0mA/10uA max @Io=100uA⇒VEN=6.5V maxの為使用不可
○TPS7B6933-Q1 $0.45 ,Iq=25uA max @Vin=40V, Vin=40V max, EN無し , Io=0Aで安定
△TPS71533-Q1 $0.35 Ignd=12uA mx @Io=50mA, Vin=24V max, EN無し, Io=0Aで安定？
VCC(3.3V)
② 74LVC374A-Q1 $0.29
Icc=10uA max
③ 74AC11-Q1 $0.27
Icc=20uA max
MPU
ｖ
ｖ
SW_input
Ii=±1uA max
@Vcc=3.6V
Vi=0V～5.5V
rst
3.3V
SW
R2
/PRE
Q
/Q
/PRE
Q
/RES
/RES
ｖ/Q
ｖ
① TPS7B6933-Q1 $0.45
Iq=25uA max @Vin=40V
Vin=4V～40V
EN無し , Io=0Aで安定
Ii=±1uA max
@Vcc=5.5V
Vi=Vcc or GND
VCC(3.3V)
VCC(3.3V)
④ 74AHC74Q-Q1 $0.23
Icc=20uA max
/OE
OSC
CLK 2
CLK 1
1kHz CLK
Ii=±5uA max
@Vcc=0V～5.5V
Vi=5.5V or GND
⑤ 74LVC1G04-Q1 $0.13
Icc=10uA max
Ii=±1uA max
@Vcc=0V～5.5V
Vi=5.5V or GND
Power Source IC
ｖ
Enable
外部回路
回路-1／回路-2 ⑥ TPS7B6933QDBVRQ1 SOT-23
VCC(3.3V)
VB
Ci
Co
Ci：
The device requires an input decoupling capacitor, the
value of which depends on the application. The typical
recommend value for the decoupling capacitor is higher
than 0.1 µF. The voltage rating must be greater than the
maximum input voltage.
Co：
The output capacitor value should be between 2.2 µF
and 100 µF. The ESR value range should be between 1
mΩ and 2 Ω. TI recommends a ceramic capacitor with
low ESR to improve the load transient response.
Typical Application Schematic
外部回路
回路-1
① TPS7A6633QDGNRQ1 MSOP-PowerPAD
VB
Co
SW
Ci：
The device requires an input decoupling capacitor, the
value of which depends on the application. The typical
recommended value for the decoupling capacitor is 10
µF. The voltage rating must be greater than the
maximum input voltage.
Co：
The device requires an output capacitor to stablize the
output voltage. The capacitor value should be between
2.2 µF and 100 µF. The ESR range should be between 1
mΩ and 2 Ω. TI recommends to selecting a ceramic
capacitor with low ESR to improve the load transient
response.
Ci
CT
Typical Application Schematic
懸念事項：
Lowパルスの幅が本来よりも最大約4.65ms長くなってしまうことが考えられます。
CT:
If this pin is open, the default delay time is 290 µs (typ).
外部回路
回路-2
① TPS7A6633QDGNRQ1 MSOP-PowerPAD
VB
Co
Co：
The device requires an output capacitor to stablize the
output voltage. The capacitor value should be between
2.2 µF and 100 µF. The ESR range should be between 1
mΩ and 2 Ω. TI recommends to selecting a ceramic
capacitor with low ESR to improve the load transient
response.
Ci
SW
Ci：
The device requires an input decoupling capacitor, the
value of which depends on the application. The typical
recommended value for the decoupling capacitor is 10
µF. The voltage rating must be greater than the
maximum input voltage.
CT
Typical Application Schematic
懸念事項：
Lowパルスの幅が本来よりも最大約4.65ms短くなってしまうことが考えられます。
CT:
If this pin is open, the default delay time is 290 µs (typ).

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