X線CCDの高速信号処理のためのアナログ・デジタル混在LSIの開発

ASIC design (first trial)
Final mask design (Digian corp.)
Chip area
2-channel iCDS
8 mm x 2.5 mm
1.5 mm x 0.5 mm
Collaboration with Ikeda-sensei (JAXA)
who developed ‘Open-IP’
Packaging (Steady Design corp.)
bonding
Bare chip
0.5 mm
1ch
2ch
LSI chip
0.5 mm
8 mm
50 mm
2.5 mm
0.7 mm
50 mm
Pad
Result of M01 using the NeXT1 chip
24mm
CCD-NeXT1
CCD-NeXT1
Pixel size
# of pixels
# of read-out
12 mm x 12 mm
2000 x 2004
2
M01 functioned properly in photon
count mode. However, the noise
level is large (55 electrons). This is
due to the chip design. We are now
developing new ASIC chip as the
second trial.
4.8 mm