Soitec, your innovation partner 技術革新は、Soitecと共に DEVICE PERFORMANCE DRIVEN BY THE SUBSTRATE 回路基板がデバイス性能を推進します。 RF-SOI FD-SOI 40,000 WAFERS @ ±1 ATOMIC LAYER 300mm SOI RAMP & 2 nd RF loss RFeSI-SOI Wafer AND AT INDUSTRIAL LEVEL +5Å GEN RFeSI Linearity Crosstalk FD-SOI transistor FD-SOI Wafer HQF - 100 dBm Target Thermal conductivity -5Å High Q passives Die size IMD < -110 dBm IIP3 > 85 dBm Ron.Coff < 113 fs OTHER ENGINEERED SUBSTRATES: SOITEC POWER SOI, PHOTONICS SOI, IMAGER SOI TECHNOLOGY ROADMAP CONTINUE MOORE’S LAW BEYOND 22nm SOI, sSOI, GeOI or III-V.OI WAFER Si, strain Si, Ge or III-V 技術ロードマップ LONG-TERM RF-SOI ROADMAP & SOLUTIONS TO INTEGRATE MORE RF FUNCTIONS Long-term roadmap for Soitec RFeSI-SOI enhanced Signal Integrity substrate For devices with high linearity requirements Soitec Stacking for RF substrate For devices with ultra-high linearity requirements FD-SOI Transistor FinFET Transistor Buried Oxide Circuit on alternative substrate New Architecture Transistor MANUFACTURING CAPACITY 2M 300mm SOI 生産能力 200mm SOI UP TO WAFERS/YEAR CAPACITY AVAILABLE WHEN NEEDED > 1M WAFERS/YEAR CAPACITY AVAILABLE Soitec Bernin 2, France High-volume manufacturing Soitec Bernin 1, France High-volume manufacturing Pasir Ris, Singapore Ready for high-volume manufacturing Simgui, China Ramp to high-volume manufacturing QUALITY SYSTEM & CERTIFICATIONS FOR AUTOMOTIVE, CONSUMER & INDUSTRIAL CUSTOMERS PARTNERSHIP & COLLABORATION TO REACH MARKET NEEDS パートナーシップと協業によりマーケットのニーズを確実に掴む事が出来ます。
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