資料(PDF)

TOPPERS/SSP
(HEW
SECTION1
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TOPPERS/SSP
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WindowsPC
C
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2. 
TOPPERS/SSP
TOPPERS/SSP
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(RTOS)
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-->
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SSP HEW
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1.Interface
RX62N
ssp_frk_rx62n_hew-20111120.lzh
2.
High-Performance Embedded
Workshop
RX
C/C++
V.1.02 Release 01
ccrxv102r01_ev.exe
: WindowsPC 32bit
SSP HEW
64bit
5
Interface
RX62N
SSP HEW
6
High-Performance
Embedded Workshop
SSP HEW
7
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1)
2)HEW HELLOWORLD
3)SSP
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(1)
(2)RX
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Windows
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subst
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C:\>subst
C:\>subst
:
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W:\>subst
W:\: => D:\usr\
ITRON
\SWEST\SEC1-WORKSPACE
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main()
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2)HEW HELLOWORLD
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***********************************************************************/
/*
*/
/* FILE
:hello1.c
*/
/* DATE
:Mon, Jul 21, 2014
*/
/* DESCRIPTION :Main Program
*/
/* CPU TYPE :RX62N
*/
/*
*/
/* This file is generated by Renesas Project Generator (Ver.4.53). */
/* NOTE:THIS IS A TYPICAL EXAMPLE.
*/
/*
*/
/***********************************************************************/
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#include<stdio.h>
//#include "typedefine.h"
#ifdef __cplusplus
//#include <ios>
// Remove the comment when you use ios
//_SINT ios_base::Init::init_cnt;
// Remove the comment when you use ios
#endif
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void main(void);
#ifdef __cplusplus
extern "C" {
void abort(void);
}
#endif
void main(void)
{
printf("Hello SWEST\n");
}
#ifdef __cplusplus
void abort(void)
{
}
#endif
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2)HEW HELLOWORLD
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CPU
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2)HEW HELLOWORLD
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\hello1\lowlvl.src
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W:\
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ssp_frk_rx62n_hew-20111120\target\frk_rx62n_hew
\sample_workspace\sample1.hws
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asm_config
cfg
kernel
sample1
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4)HEW
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4)HEW
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4)HEW
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4)HEW
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CPU
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(1)lowlvl.src
w:\
(2)
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\pdic\rx600
\pdic\rx600\rx600_uart.c: rx600_uart_snd_chr(SIOPCB
*p_siopcb, char_t c)
\pdic\rx600\rx600_uart.c: void rx600_uart_pol_putc(char_t
c, ID siopid)
\syssvc\serial.c: serial_wri_chr(SPCB *p_spcb, char_t c)
(3)Sample1
(LOGPUT)
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\pdic\rx600\rx600_uart.c:
/*
1
*/
extern void charput(unsigned char);
/*
*
I/O
*/
void
rx600_uart_pol_putc(char_t c, ID siopid)
{
#if 0
const SIOPINIB *p_siopinib;
---------------------------------------------------------------------------------sil_wrb_mem((void *)p_siopinib->tdreg, (uint8_t)c);
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#endif
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}
charput(c);
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/*
*
I/O
*/
bool_t
rx600_uart_snd_chr(SIOPCB *p_siopcb, char_t c)
{
bool_t ercd = false;
#if 0
if((sil_reb_mem(
(void *)p_siopcb->p_siopinib->ssrreg) & SCI_SSR_TEND_BIT) != 0){
sil_wrb_mem((void *)p_siopcb->p_siopinib->tdreg, (uint8_t)c);
ercd = true;
}
#endif
charput(c);
ercd = true;
return ercd;
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}
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syssvc\serial.c: serial_wri_chr(SPCB *p_spcb, char_t c)
/*
1
*/
extern void charput(unsigned char);
/*
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*
1
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*/
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static ER_BOOL
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serial_wri_chr(SPCB *p_spcb, char_t c)
! 
{
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#if 0
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bool_t
buffer_full;
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ER
ercd, rercd;
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/*
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* LF
CR
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*/
---------------- ---------------------------------------------------------------------------------! 
#endif
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charput(c);
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return(false);
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}
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sample1.c
void main_task(intptr_t exinf)
{
static ID tskid = TASK1;
static uint_t tskno = 1;
char_t c;
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-------
LOGPUT("Sample program ACTIVE.\n");
/*
*/
if(serial_rea_dat(SIO_PORTID , &c , 1) > 0)
{
------------------------------------
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sample1.c fg
10
#include "sample1.h"
CRE_TSK(INIT_TASK , { TA_ACT , 0 , init_task , INIT_PRIORITY , STACK_SIZE , NULL });
CRE_TSK(MAIN_TASK , { TA_NULL , 0 , main_task , MAIN_PRIORITY , STACK_SIZE ,
NULL });
CRE_TSK(TASK1 , { TA_NULL , 1 , task , TASK1_PRIORITY , STACK_SIZE , NULL });
CRE_TSK(TASK2 , { TA_NULL , 2 , task , TASK2_PRIORITY , STACK_SIZE , NULL });
CRE_TSK(TASK3 , { TA_NULL , 3 , task , TASK3_PRIORITY , STACK_SIZE , NULL });
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DEF_EPRI(TASK3 , { TASK3_EXEPRIORITY });
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#ifdef USE_TIMER
CRE_CYC(MAIN_CYC , { TA_STA , MAIN_TASK , cyclic_handler , 200 , 100 });
#endif /* USE_TIMER */
---------------------------------------------------------------
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4.
! 
! 
! 
! 
Sourceforge
https://sourceforge.jp/users/alvstakahashi/pf/TOPPERS_ETC/
wiki/FrontPage
Interface
RX62N
HEW
E1
SIO
! 
! 
SSP
-->
! 
SSP HEW
32
SSP
SECTION 2
SSP
1
! 
TOPPERS/SSP
shrink-sp-rx62n
! 
SSP
2
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1)
2)
3)
SSP
3
SSP
! 
Interface
RX62N
RTOS
RTOS
/
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! 
SSP
/
! 
SSP
4
! 
! 
TOPPERS/SSP
SSP
5
)
2)RX
HELLOWORLD
3)
SSP
4)
SSP
6
)
Windows PC
High-Performance
Embedded Workshop
RX
C/C++
V.1.02 Release 01
ccrxv102r01_ev.exe
SSP shrink-sp-rx62n.zip
SSP
7
High-Performance
Embedded Workshop
SSP
8
Shrink-SP-RX62N
SSP
9
2)RX
HELLOWORLD
! 
RX
! 
HEW
(HEW)
main()
SSP
10
2)RX
HELLOWORLD
SSP
11
2)RX
HELLOWORLD
SSP
12
2)RX
HELLOWORLD
SSP
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2)RX
HELLOWORLD
SSP
14
2)RX
HELLOWORLD
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! 
! 
***********************************************************************/
/*
*/
/* FILE
:hello1.c
*/
/* DATE
:Mon, Jul 21, 2014
*/
/* DESCRIPTION :Main Program
*/
/* CPU TYPE :RX62N
*/
/*
*/
/* This file is generated by Renesas Project Generator (Ver.4.53). */
/* NOTE:THIS IS A TYPICAL EXAMPLE.
*/
/*
*/
/***********************************************************************/
! 
! 
! 
! 
! 
! 
! 
#include<stdio.h>
//#include "typedefine.h"
#ifdef __cplusplus
//#include <ios>
// Remove the comment when you use ios
//_SINT ios_base::Init::init_cnt;
// Remove the comment when you use ios
#endif
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2)RX
HELLOWORLD
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void main(void);
#ifdef __cplusplus
extern "C" {
void abort(void);
}
#endif
void main(void)
{
printf("Hello SWEST\n");
}
#ifdef __cplusplus
void abort(void)
{
}
#endif
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HELLOWORLD
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CPU
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3)
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SSP
(
SSP
SSP/
include
!  (
SSP C
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3)
SSP
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RXstanderd toolchain
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3)
SSP
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3)
SSP
(
-vectn=28=__kernel_default_int_handler_entry
RXstanderd toolchain
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3)
SSP
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vect.h
// CMTU0_CMT0
//#pragma interrupt (Excep_CMTU0_CMT0(vect=28))
//void Excep_CMTU0_CMT0(void);
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(
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resetprg.c
//
set_psw(PSW_init);
chg_pmusr();
sta_ker();
//
main();
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// Set Ubit & Ibit for PSW
_CLOSEALL();
// Use SIM I/O
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3)
(5)
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SSP
#include <kernel.h>
#include "kernel_cfg.h"
#include <machine.h>
#include "iodefine.h"
iodefine.h
// Include machine.h
// Include
! 
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! 
! 
#include<stdio.h>
//#include "typedefine.h"
#ifdef __cplusplus
//#include <ios>
// Remove the comment when you use ios
//_SINT ios_base::Init::init_cnt;
// Remove the comment when you use ios
#endif
SSP
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3)
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SSP
void main(intptr_t arg);
#ifdef __cplusplus
extern "C" {
void abort(void);
}
#endif
void main(intptr_t arg)
{
printf("hello main\n");
PORT1.DDR.BIT.B5 = 1;
MSTP( CMT0 ) = 0;
CMT0.CMCOR = 4800000/512/2 - 1;
CMT0.CMCR.WORD = 0x0043;
IEN( CMT0, CMI0 ) = 1;
IPR( CMT0, CMI0 ) = 1;
Interrupt Level is 1
//
set_psw( 0x00010000 );
IPL=0 of PSW
CMT.CMSTR0.BIT.STR0 = 1;
//
for(;;)
//
;
}
// P15 is Output
// Wakeup CMT0,CMT1
// CMCOR is 500ms Count
// CMIE is Enable,CKS is PCLK/512
// CMI0 Enable
// CMI0
// Set I=1,
// Start CMT0
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void task2(intptr_t arg)
{
printf("task2\n");
}
void CMI0(void) // Interrupt Function
{
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! 
SSP
}
// Multiple Interrupt Enable
// Reverse P15(LED)
PORT1.DR.BIT.B5 ^= 1;
iact_tsk(TASK2_ID);
#ifdef __cplusplus
void abort(void)
{
}
#endif
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SSP
(6)
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3)
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3)
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4)
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target_kernel.h
prc_support.src
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JUMP
TOPPERS/SSP
/
SSP
32
WAIT_SSP
SECTION 3
WAIT_SSP
1
! 
WAIT_SSP
WAIT_SSP
2
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1)WAIT_SSP
2)WAIT_SSP
3)WAIT_SSP
4)WAIT_SSP
5)
WAIT_SSP
3
WAIT_SSP
! 
SSP
! 
WAIT_SSP
4
WAIT_SSP
! 
! 
WAIT_SSP
5
WAIT_SSP
! 
wai_tsk() / go_tsk()
/
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8
8
! 
WAIT_SSP
6
WAIT_SSP
! 
! 
SSP
https://sourceforge.jp/users/
alvstakahashi/pf/WAIT_SSP/files/
! 
WAIT_SSP
7
WAIT_SSP
! 
! 
1)
setjmp/longjmp
2)
WAIT_SSP
/
8
1)
/
WAIT_SSP
9
1)
/
jmp
! 
setjmp
! 
longjmp
! 
setjmp
setjmp
longjmp
WAIT_SSP
jmp
10
2)
! 
setjmp/longjmp
ACC
! 
/
RUN
! 
WAIT_SSP
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2)
! 
RUN
setjmp
longjmp()
WAIT_SSP
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2)
WAIT_SSP
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2)
WAIT_SSP
14
(RTOS
! 
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IoT
(Ardiuno)
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WAIT_SSP
15
SSP
SSP
SECTION 4
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SSP
SSP
1
1
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start.src---
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target_support.src---
! 
startup.c ----sta_ker()
! 
target_config.c ----
HEW
2
2
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prc_config.c ---rx600_usrt.c ---target_serial.c ---target_timer.c ---banner.c ---serial.c ---banner.tf ---kernel_cfg.c
kernel_initialize_task ---kernel_initialize_interrupt() ---kernel_initialize_exception() ----
3
3
! 
task.c ---
4
4
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prc_support.src
kernel_start_dispatch ----------kernel_call_exit_kernel----------ret_int
--------------------------ret_int_r_rte:
----------------kernel_interrupt: ---------------kernel_exception ---------------interrupt.c ---------------------------exception.c --------------------------

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