SURE: Shizuoka University REpository
http://ir.lib.shizuoka.ac.jp/
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CMOSイメージセンサのカラム並列型低ノイズ信号読み
出し回路に関する研究
榊原, 雅樹
静岡大学大学院電子科学研究科研究報告. 28, p. 107-109
2007-03-22
http://hdl.handle.net/10297/1179
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This document is downloaded at: 2015-12-29T17:01:43Z
A Study on Column-Parallel Low-Noise
Readout Circuits for CMOS
Image Sensors
2006
Masaki Sakakibara
This thesis is focused on column-parallel low-noise readout circuits for CMOS image sensors. Amplification at the column-
parallel signal readout circuits is effective for reducing the readout noise of CMOS image sensors. However, the simple
amplification leads to the reduction of signal dynamic range. This thesis treats three techniques for reducing the readout noise
while maintaining the wide dynamic range.
The first technique proposed is an adaptive amplification of image signal. Using a comparator in each column, pixel output
signal is adaptively amplified with the gain
of 1 or 8. An experimental application of the circuit using A.257tm CMOS
technology with pinned photodiodes gives a low random noise of 263pYrms and a wide dynamic range of 71dB.
The second technique uses an analog-to-digital converter for low-noise signal readouts and the wide dynamic range in
digital domain. The proposed digital double integration with a delta modulation type A/D convefier effectively reduces both the
random noise and the quantization noise. The quantizationnoise reduction effect is theoretically analyzed with a state transition
diagram and is confirmed by simulations with random signals.
The third technique is based on an adaptive integration for effective noise reduction and the resulting wide dynamic range
in digital domain. Experimental results show that the column adaptive integration of 16 times and succeeding 12-bit cyclic A/D
conversion attain the random noise of 66.ltrrVrms and linear dynamic range of 82.7dB.
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