Intro

PROGETTO DI SISTEMI
ELETTRONICI DIGITALI
Digital Systems Design
Emiliano Sisinni
[email protected]
www.ing.unibs.it/~sisinni
Ricevimento: Studio 23
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
Timetable
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
Goals & Objectives
In this course, you will:
• Learn how the hardware (HW) and software (SW) components of a
microprocessor-based system work together to implement digital
systems.
• Learn both HW and SW aspects of integrating digital devices
(memory, I/O interfaces, etc.) into microprocessor / microcontroller
systems.
• Get practical hands-on experience in system design and
programming
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
Goals and Objectives
In the classroom lectures, you will learn more about the hardware
architecture aspects of microprocessors and microcontrollers based
system, their internal building blocks, operation principles,
interfacing with other digital systems etc…
In the laboratory sessions (ELE2), you
will learn more about the programming
and implementation of digital systems
using state-of-the-art devices (DSP
TIC6711, dsPIC33F, FPGA Altera
Cyclone III…).
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
Background
Do you already know:
• What are the main components of a microprocessor / microcontroller
system ?
• How does the microprocessor execute the instructions ?
• How is the memory organized, and how do you access / use
memory ?
• How can you interface a microprocessor with other external
components ?
• How to write simple machine language code ?
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
Grading
• 50% Examinations (Theoretial aspects)
– Up to 16 pts
– HARDWARE SIDE
•
•
•
•
•
Main concepts of microprocessors
GPP vs DSP
Architecture & Instruction set
ADCs and DACs
Programmable Logic Device
– SOFTWARE SIDE
• Filter implementation, C & VHDL
• 50% Lab Project (work in 2-3 people) on DSP/FPGA
– Up to 16 pts
– Possible “collaboration” with other courses
• You need to pass both of them!
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
Textbook
• “The Scientist and Engineer's Guide to Digital Signal
Processing” by Steven W. Smith, Ph.D.
• http://www.dspguide.com/
• “Mixed-Signal and DSP Design Techniques,” edited
by Walt Kester (Newnes, 2003)
• http://www.analog.com/en/content/mixed_signal_
dsp_design_book
• “Programming dsPIC MCU in C,” edited by Walt
Kester (Newnes, 2003)
• http://www.mikroe.com/products/view/266/progra
mming-dspic-mcu-in-c/
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
Textbook
• TMS320C6000 DSP Optimization Workshop
• http://processors.wiki.ti.com/index.php/TMS320C
6000_DSP_Optimization_Workshop
• “Digital Logic and Microprocessor Design with
VHDL” by Enoch O. Hwang (Nelson, 2006)
• http://faculty.lasierra.edu/~ehwang/digitaldesign/
• “The Art of Hardware Architecture - Design Methods
and Techniques for Digital Circuits”, by Arora Mohit
(Springer, 2012)
• http://www.springer.com/engineering/circuits+%2
6+systems/book/978-1-4614-0396-8
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
PSED – Electronic Digital System Design
• (Electronic) Digital
– Everything is performed in
the digital way today!
– Analog vs Digital
– SN VS Cost
ANALOG
DIGITAL
• Systems Design
– We deal with (very)
complex systems, not a
single device!
– Usually in the form of
Embedded Systems
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
PSED – Electronic Digital System Design
• “Thus, although many signal processing will
be most economically implemented with
analog methods, it is the capability of digital
system to achieve a guaranteed accuracy
and essentially perfect reproducibility that is
so appealing to engineers.
• To summarize, the importance of the DSP
should eventually surpass that of analog
signal processing for the same reasons
that digital computers have surpassed
analog computers.”
• p5, “Theory and Application of Digital Signal
Processing” Prentice Hall, 1975, Lawrence
Rabiner and Bernard Gold
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
Embedded Systems
• Invisible computers, inside most of the
devices we use (music player, mobile
phone, cars, trains, medical
equipment,…).
– An embedded system is a special-purpose
computer system, part of a larger system
which it controls
• More than humans on the planet, already
– 40 billion of such devices by 2020
– 99% of processors used in embedded
systems
• €113 billion global market in 2010, growth
of 7%
– Market size is about 100 times the desktop
market
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
Embedded systems are everywhere
• From your bathroom…
– Product: Sonicare Plus toothbrush.
– Microprocessor: 8-bit Zilog Z8.
• … to Mars
– Product: NASA's Mars Sojourner Rover.
– Microprocessor: 8-bit Intel 80C85.
You need very different
competences!
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
Automotive Electronics
Embedded systems:
90% future innovations
40% price
1970
13
1980
1990
E. Sisinni – Progetto di Sistemi Elettronici Digitali
2000
Automotive Electronics
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
Evolution of handsets and technology
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
Anatomy of a Smartphone
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
Wireless Communication Systems
App Data
Upper Protocol
Layers
Packets
Physical Layer
(PHY)
Baseband
Processing
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
“Air”
Analog Front End
Software Defined Radio – SDR –
• Use software routines instead of (AS)ICs for the physical
layer operations of wireless communication system
• Both Analog Frontend and Digital Baseband are the scope
of SDR
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
SDR Levels
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
SDR Levels
<source:http://www.sdrforum.org>
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Tier
Name
Description
Tier 0
Hardware Radio (HR)
Implemented using hardware components.
Cannot be modified
Tier 1
Software Controlled
Radio (SCR)
Only control functions are implemented in
software: inter-connects, power levels, etc.
Tier 2
Software Defined
Radio (SDR)
Software control of a variety of modulation
techniques, wide-band or narrow-band
operation, security functions, etc.
Tier 3
Ideal Software Radio
(ISR)
Tier 4
Ultimate Software
(Cognitive) Radio
(USR)
Programmability extends to the entire system
with analog conversion only at the antenna.
Not only does this form of software defined radio
have full programmability, but it is also able to
support a broad range of functions and
frequencies at the same time.
E. Sisinni – Progetto di Sistemi Elettronici Digitali
Embedded systems… what are?
CHARACTERISTICS:
• Single-functioned
– Dedicated to perform a single function
• Complex functionality
– Often have to run sophisticated algorithms or multiple algorithms.
• Cell phone, laser printer.
• Tightly-constrained
– Low cost, low power, small, fast, etc.
• Reactive and real-time
– Continually reacts to changes in the system’s environment
– Must compute certain results in real-time without delay
• Safety-critical
– Must not endanger human life and the environment
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
Embedded systems design problems
• Find an implementation that can perform the computation such that
the requirements are satisfied.
• Embedded systems perform computations (software) that are
subject to physical constraints (hardware)
– Reaction to a physical environment: deadline, throughput, jitter
– Execution on a physical platform: processor speed, power, reliability
• The need for an embedded systems design discipline
– Computer science separates computation from physical constraints
– Computer engineering ignores computation
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
Determinism
• A system is said to be real-time if the
total correctness of an operation
depends not only upon its logical
correctness, but also upon the time in
which it is performed.
• The classical conception is that in a
hard real-time or immediate real-time
system, the completion of an operation
after its deadline is considered useless
- ultimately, this may cause a critical
failure of the complete system.
• A soft real-time system on the other
hand will tolerate such lateness, and
may respond with decreased service
quality (e.g., omitting frames while
displaying a video).
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
Isochronous systems
• Isochronous: it literally means to occur at the same time or at equal
time intervals. In general English language, it refers to something
that occurs at a regular interval, of the same duration; as opposed to
synchronous which refers to more than one thing happening at the
same time
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
DSP ?
• Definition:
– DSP – Digital Signal Processing/Processor
– It refers to:
• Theoretical signal processing by digital means
• Specialized hardware (processor) that can process signals in
real-time
• Signal – a detectable physical quantity or impulse (as a voltage,
current, or magnetic field strength) by which messages or
information can be transmitted (Webster Dictionary)
• Signals generated via physical phenomenon are analog in that
– Their amplitudes are defined over the range of real/complex numbers
– Their domains are continuous in time or space.
• Processing analog signal requires dedicated, special hardware.
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
DSP ?
• Signal Characteristics:
– Signals are Physical Quantities:
– Signals are Measurable
– Signals are Analog
– Signals Contain Information.
•
Examples:
–
–
–
–
–
–
–
–
–
Temperature
Pressure
Mass
Speed
Acceleration
Torque
Voltage
Current
Power
[oC]
[Newtons/m2] or [Pa]
[kg]
[m/s]
[m/s2]
[Newton*m]
[Volts]
[Amps]
[Watts]
• For us, analog signals are electrical.
– Sensors: are devices that convert other physical quantities
(temperature, pressure, etc.) to electrical signals.
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
DSP !
• Digital signal processing concerns processing signals using digital
computers.
– A continuous time/space signal must be sampled to yield countable
signal samples.
– The real-(complex) valued samples must be quantized to fit into internal
word length
• Digital is “better” than Analog; analog cons:
–
–
–
–
–
Aging
Sensitivity to the environment
Uncertain performance in production units
Variation in performance of units
Sensitivity analog traces on PCBs
• DSP doesn’t have these problems!
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
Why Using DSP?
• As a practical example of the power of DSP, consider the
comparison between an analog and a digital lowpass filter, each
with a cutoff frequency of 1kHz.Low-pass
• The digital filter is implemented in a typical sampled data system
and it is a FIR filter with 129 taps, while the Analog Filter is a
Chebyshev of Type I and Order 6.
•
•
•
•
•
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Chebyshev Type I (Pass-Band Ripple)
6-Pole
1.0 dB Pass-Band Ripple
Non-liner Phase
MATLAB: fdatool
– Order = 6
– Fs = 10,000 Hz
– Fpass = 1,000 Hz
– Apass = 1 [dB]
•
•
•
•
•
•
FIR,
129-Tap,
Less then 0.002 dB Pass
Band Ripple
Sharper roll-off
Linear Phase
It could not be realized
using analog techniques!
E. Sisinni – Progetto di Sistemi Elettronici Digitali
Example of a 6-pole active low-pass filter
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
DSP Implementation
• It is assumed that an ADC/DAC combination is available with
sufficient sampling frequency, resolution, and dynamic range to
accurately process the signal.
• The DSP is fast enough to complete all its calculations within the
sampling interval, 1/fs.
• Analog filters are still required at the ADC input and DAC output for
antialiasing and anti-imaging, but the performance demands are not
as great.
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
Magnitude Response of Chebyshev Type I Order 6
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
Pass-Band Ripple 1.0 dB
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
FIR Filter Magnitude Response
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
Less then 0.002 dB Pass-Band Ripple
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
Analog vs. Digital Implementations
Analog
• Cons:
– Approximate Filter Coefficients
• Only standard components
available
– Environment Temperature
dependent
– Less accurate
– Can be used only for designed
purpose
• Pros:
– Operate in real-time
Digital (DSP)
• Cons:
– Real-time operation is
dependent on the speed of
processor and the complexity
of problem at hand.
• Pros:
– Accurate Filter implementation
to desired precision
– Operation independent on the
environment.
– Flexible
• DSP’s can be
reprogrammed.
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
Real-Time DSP
• Example:
• Processor clocked @ 120 MHz and can perform 120MIPS ( 1
instruction per cycle)
– Sampling rate = 8kSa/s (voice-band, telephony)
number of instructions per sample = 15000.
– Sampling rate = 48kSa/s (Digital Audio Tape - DAT)
number of instructions per sample = (120 x 106)/(48 x 103) = 2500.
– Sampling rate = 75MHz (CIF 360x288 Video at 30 frames per second)
number of instructions per sample = 1.6.
Digital Signal in
Real-Time
Digital Processing
Digital Signal out
Time-constrained Operation or Transformation
performed on digital signals within a required period
of time to maintain synchronization with occurring events.
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
Embedded Systems Design
• What are the FoM (Figure of Merit) of an
embedded systems?
• What are the trade-offs?
E. Sisinni – Progetto di Sistemi Elettronici Digitali
Back to design challenge - optimizing design metrics
• Obvious design goal:
– Construct an implementation with desired functionality
• Key design challenge:
– Simultaneously optimize numerous design metrics
• Design metric
– A measurable feature of a system’s implementation
– Optimizing design metrics is a key challenge
• Common metrics
– Unit cost: the monetary cost of manufacturing each copy of the system,
excluding NRE cost
– NRE cost (Non-Recurring Engineering cost): The one-time monetary
cost of designing the system
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
Back to design challenge - optimizing design metrics
• Other Common metrics
–
–
–
–
–
–
–
–
39
Size: the physical space required by the system
Performance: the execution time or throughput of the system
Power: the amount of power consumed by the system
Flexibility: the ability to change the functionality of the system without
incurring heavy NRE cost
Time-to-prototype: the time needed to build a working version of the
system
Time-to-market: the time required to develop a system to the point that it
can be released and sold to customers
Maintainability: the ability to modify the system after its initial release
Correctness, safety, many more…
E. Sisinni – Progetto di Sistemi Elettronici Digitali
Metrics: improving one may worsen others
• Expertise with both software and hardware is
needed to optimize design metrics
– Not just a hardware or software expert, as is
common
– A designer must be comfortable with various
technologies in order to choose the best for a
given application and constraints
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
Time-to-market: a demanding design metric
Revenues ($)
•
•
•
•
Time required to develop a
product to the point it can be
sold to customers
Market window
– Period during which the
product would have
highest sales
Average time-to-market
constraint is about 8 months
Delays can be costly
Time (months)
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
Losses due to delayed market entry
• Simplified revenue model
Peak revenue
Revenues ($)
Peak revenue from
delayed entry
On-time
Market fall
Market rise
Delayed
D
On-time
entry
42
W
Delayed
entry
2W
Time
– Product life = 2W, peak at
W
– Time of market entry
defines a triangle,
representing market
penetration
– Triangle area equals
revenue
• Loss
– The difference between the
on-time and delayed
triangle areas
E. Sisinni – Progetto di Sistemi Elettronici Digitali
Losses due to delayed market entry (cont.)
• Area = 1/2 * base * height
– On-time = 1/2 * 2W * W
– Delayed = 1/2 * (W-D+W)*(W-D)
Peak revenue
Revenues ($)
Peak revenue from
delayed entry
• Percentage revenue loss =
(D(3W-D)/2W2)*100%
On-time
Market fall
Market rise
• Try some examples
Delayed
D
On-time
entry
43
W
Delayed
entry
2W
Time
– Lifetime 2W=52 wks, delay D=4
wks
– (4*(3*26 –4)/2*26^2) = 22%
– Lifetime 2W=52 wks, delay D=10
wks
– (10*(3*26 –10)/2*26^2) = 50%
– Delays are costly!
E. Sisinni – Progetto di Sistemi Elettronici Digitali
NRE and unit cost metrics
• Costs:
– Unit cost: the monetary cost of manufacturing each copy of the system,
excluding NRE cost
– NRE cost (Non-Recurring Engineering cost): The one-time monetary
cost of designing the system
– total cost = NRE cost + unit cost * # of units
– per-product cost
= total cost / # of units
= (NRE cost / # of units) + unit cost
• Example
– NRE=$2000, unit=$100
– For 10 units
– total cost = $2000 + 10*$100 = $3000
– per-product cost = $2000/10 + $100 = $300
Amortizing NRE cost over the units results in
an additional $200 per unit
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
NRE and unit cost metrics
• Compare technologies by costs -- best depends on
quantity
– Technology A: NRE=$2,000, unit=$100
– Technology B: NRE=$30,000, unit=$30
– Technology C: NRE=$100,000, unit=$2
$200,000
B
C
$120,000
$80,000
A
B
$160
p er p rod uc t c ost
$160,000
tota l c ost (x1000)
$200
A
$40,000
C
$120
$80
$40
$0
$0
0
800
1600
2400
Numb er of units (volume)
0
800
1600
Numb er of units (volume)
• But, must also consider time-to-market
45
2400
E. Sisinni – Progetto di Sistemi Elettronici Digitali
The performance design metric
• Widely-used measure of system, widely-abused
– Clock frequency, instructions per second – not good measures
– Digital camera example – a user cares about how fast it processes
images, not clock speed or instructions per second
• Latency (response time)
– Time between task start and end
– e.g., Camera’s A and B process images in 0.25 seconds
• Throughput
– Tasks per second, e.g. Camera A processes 4 images per second
– Throughput can be more than latency seems to imply due to
concurrency, e.g. Camera B may process 8 images per second (by
capturing a new image while previous image is being stored).
• Speedup of B over S = B’s performance / A’s
performance
– Throughput speedup = 8/4 = 2
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
Three key embedded system technologies
• Technology
– A manner of accomplishing a task, especially using technical processes,
methods, or knowledge
• Three key technologies for embedded systems
– Processor technology: The architecture of the computation engine
used to implement a system’s desired functionality
– IC technology: The manner in which an analog/digital implementation
is mapped onto an IC
– Design technology: The manner in which we convert our concept of
desired system functionality into an implementation
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
Processor technology
• Processors vary in their customization for the problem at hand
y[n]   h[k ].x[n  k ]
Desired
functionality
Generalpurpose
processor
48
y[n]=0;
for (n=0; n<N;n++)
{
for (k = 0;k<N;k++) //inner loop
y[n] = y[n] + h[k]*x[n-k];
}
Application-specific
processor
E. Sisinni – Progetto di Sistemi Elettronici Digitali
Singlepurpose
processor
General-purpose processors
• Programmable device used in a
variety of applications
– Also known as “microprocessor”
• Features
– Program memory
– General datapath with large register file
and general ALU
• User benefits
– Low time-to-market and NRE costs
– High flexibility
Datapath
Control
logic and
State
register
Register
file
IR
PC
Program
memory
• “Intel processors” the most wellknown, but there are hundreds of
others
49
Controller
E. Sisinni – Progetto di Sistemi Elettronici Digitali
Assembly
code for:
total = 0
for i =1 to …
General
ALU
Data
memory
Multiply and Accumulate - GPP
R0
11
12
3
11
24
X
R1
1

9
2
3
Loop
50
Clr
A
;Clear Accumulator A
Clr
B
; Clear Accumulator B
Mov
*R0, Y0
; Move data from memory location 1 to register Y0
Mov
*R1,X0
; Move data from memory location 2 to register X0
Mpy
X0,Y0,A
;X0*Y0 ->A
Add
A,B
;A + B -> B
Inc
R0
;R0 + 1 -> R0
Inc
R1
;R1 + 1 -> R1
Dec
N
;Dec N (initially equals to 3)
Tst
N
;Test for the value
Jnz
Loop
;Different than zero loop again
Mov
B,*R2
;Move result to memory
E. Sisinni – Progetto di Sistemi Elettronici Digitali
R2
44
Single-purpose processors
• Digital circuit designed to execute
exactly one program
– a.k.a. coprocessor, accelerator or
peripheral
• Features
– Contains only the components needed to
execute a single program
– No program memory
• Benefits
– Fast
– Low power
– Small size
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
Controller
Datapath
Control
logic
index
total
State
register
+
Data
memory
Application-specific processors
• Programmable processor optimized for
a particular class of applications
having common characteristics
Controller
Control
logic and
State
register
– Compromise between general-purpose
and single-purpose processors
• Features
– Program memory
– Optimized datapath
– Special functional units
IR
– Some flexibility, good performance, size
and power
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
Registers
Custom
ALU
PC
Program
memory
• Benefits
Datapath
Assembly
code for:
total = 0
for i =1 to …
Data
memory
Multiply and Accumulate - ASP
11
12
3
11
24
X
1

R2
44
9
2
3
53
Clr
A
;Clear Accumulator A
Rep
N
; Rep N times the next instruction
MAC
*(R0)+, *(R1)+, A
; Fetch the two memory locations pointed by R0 and R1,
multiply them together and add the result to A, the final result
is stored back in A
Mov
A, *R2
; Move result to memory
E. Sisinni – Progetto di Sistemi Elettronici Digitali
IC technology
• IC technologies:
– IC: Integrated circuit, or “chip”
– IC technologies differ in their customization to a design
– IC’s consist of numerous layers (perhaps 10 or more); IC technologies
differ with respect to who builds each layer and when
• Three types of IC technologies
– Full-custom/VLSI
– Semi-custom ASIC (gate array and standard cell)
– PLD (Programmable Logic Device)
IC package
IC
gate
oxide
source channel drain
Silicon
substrate
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
Full-custom/VLSI
• All layers are optimized for an embedded system’s particular digital
implementation
– Placing transistors
– Sizing transistors
– Routing wires
• Benefits
– Excellent performance, small size, low power
• Drawbacks
– High NRE cost (e.g., $300k), long time-to-market
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
Semi-custom
• Lower layers are fully or partially built
– Designers are left with routing of wires and maybe placing some blocks
• Benefits
– Good performance, good size, less NRE cost than a full-custom
implementation (perhaps $10k to $100k)
• Drawbacks
– Still require weeks to months to develop
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
PLD (Programmable Logic Device)
• All layers already exist
– Designers can purchase an IC
– Connections on the IC are either created or destroyed to implement
desired functionality
– Field-Programmable Gate Array (FPGA) very popular
• Benefits
– Low NRE costs, almost instant IC availability
• Drawbacks
– Bigger, expensive (perhaps $30 per unit), power hungry, slower
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
Design Technology
• The manner in which we convert our concept of desired system
functionality into an implementation
Compilation/Synthesis:
Automates exploration and
insertion of implementation
details for lower level.
Libraries/IP: Incorporates
pre-designed
implementation from lower
abstraction level into
higher level.
Test/Verification: Ensures
correct functionality at
each level, thus reducing
costly iterations between
levels.
System
specification
Behavioral
specification
RTL
specification
Logic
specification
Compilation/ Libraries/
Synthesis
IP
Test/
Verification
System
synthesis
Hw/Sw/
OS
Model
simulat./
checkers
Behavior
synthesis
Cores
Hw-Sw
cosimulators
RTL
synthesis
RTL
HDL
components simulators
Logic
synthesis
Gates/
Cells
To final implementation
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
Gate
simulators
The HW design mimics the SW
• Abstraction and
clustering!
IP Block Performance
Inter IP Communication Performance Models
abstract
Transistor Model
Capacity Load
1970’s
59
abstract
Gate Level Model
Capacity Load
abstract
abstract
SDF (Standard Delay Format)
Wire Load (the information to estimate wiring delays;
area, resistance,capacitance,slope and fanout)
IP Blocks
RTL
cluster
RTL
Clusters
SW
Models
cluster
cluster
1980’s
1990’s
E. Sisinni – Progetto di Sistemi Elettronici Digitali
Year 2000 +
The co-design ladder
• In the past:
– Hardware and software design
technologies were very different
– Recent maturation of synthesis
enables a unified view of
hardware and software
• Now: hardware/software
“codesign”
– The choice of hardware versus
software for a particular function
is simply a tradeoff among various
design metrics, like performance,
power, size, NRE cost, and
especially flexibility; there is no
fundamental difference between
what hardware or software can
implement.
60
Sequential program code (e.g., C, VHDL)
Compilers
(1960's,1970's)
Behavioral synthesis
(1990's)
Register transfers
Assembly instructions
Assemblers, linkers
(1950's, 1960's)
Machine instructions
RT synthesis
(1980's, 1990's)
Logic equations / FSM's
Logic synthesis
(1970's, 1980's)
Logic gates
Implementation
Microprocessor plus program
bits: “software”
E. Sisinni – Progetto di Sistemi Elettronici Digitali
VLSI, ASIC, or PLD
implementation: “hardware”
Independence of processor and IC technologies
• Basic tradeoff
– General vs. custom
– With respect to processor technology or IC technology
– The two technologies are independent
General,
providing improved:
Generalpurpose
processor
ASP
Singlepurpose
processor
Flexibility
Maintainability
NRE cost
Time- to-prototype
Time-to-market
Cost (low volume)
Power efficiency
Performance
Size
Cost (high volume)
PLD
61
Customized,
providing improved:
Semi-custom
Full-custom
E. Sisinni – Progetto di Sistemi Elettronici Digitali
IC capacity
•
•
•
•
Moore’s law
The most important trend in embedded systems
Predicted in 1965 by Intel co-founder Gordon Moore
IC transistor capacity has doubled roughly every 18 months for the
past several decades.
• Something that doubles frequently grows more quickly than most
people realize!
– A 2002 chip can hold about 15,000 1981 chips inside itself
1981
1984
1987
1990
1993
1996
1999
10,000
transistors
150,000,000
transistors
Leading edge
chip in 1981
62
2002
E. Sisinni – Progetto di Sistemi Elettronici Digitali
Leading edge
chip in 2002
Design productivity gap
• While designer productivity has grown at an impressive rate over the
past decades, the rate of improvement has not kept pace with chip
capacity!
– 1981 leading edge chip required 100 designer months
• 10,000 transistors / 100 transistors/month
– 2010 leading edge chip requires 1,000,000 designer months
• 1E10 transistors / 1E4 transistors/month
• Designer cost increase from $1M to $1B
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
Increasing complexity: HW vs SW
• An example: 3G and 4G cellular
systems.
• Complexity demand of modern
communication systems,
particularly in the wireless domain,
grows at an astounding rate, a rate
so high that the available
complexity and even worse the
design productivity required to
convert algorithms into silicon are
left far behind.
• This effect is commonly referred to
as the design productivity crisis or
simply the design gap
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E. Sisinni – Progetto di Sistemi Elettronici Digitali
The mythical man-month
• The situation is even worse than the productivity gap indicates
•
•
In theory, adding designers to team reduces project completion time
In reality, productivity per designer decreases due to complexities of team
management and communication
In the software community, known as “the mythical man-month” (Brooks 1975)
At some point, can actually lengthen project completion time! (“Too many cooks”)
•
•
•
•
•
65
1M transistors, 1
designer=5000
trans/month
Each additional designer
reduces for 100
trans/month
So 2 designers produce
4900 trans/month each
60000
50000
40000
30000
20000
10000
16
15
Team
16
19
18
23
24
Months until completion
43
Individual
0
10
Number of designers
20
E. Sisinni – Progetto di Sistemi Elettronici Digitali
30
40
What to use?
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E. Sisinni – Progetto di Sistemi Elettronici Digitali

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