Introduction to Freescale Radar Microcontroller Solutions 嵌入式雷达技术推动汽车安全进展 飞思卡尔雷达控制器解决方案简介 FTF-AUT-F0077 Gao Lei Automotive FAE Manager – China 高磊 汽车电子应用工程经理 – 中国区 M A Y. 2 0 1 4 TM External Use Overview • • • • • • ADAS Trends and Need for Radar Systems Radar Fundamentals Freescale Radar Solutions MRD2001 Packaged Radar Chipset MPC5775K Microcontroller Summary and Conclusions • ADAS 发展趋势及对雷达系统的需求 雷达基本概念 飞思卡尔的雷达解决方案 MRD2001雷达芯片组 MPC577xK微控制器 总结 • • • • • TM External Use 1 Market Trends • Automotive Safety catches public eyes. In 2010, 1.24 million people were killed on the world’s roads, the eighth leading cause of death globally (World Health Organization). 道路交通事故受到更多的关注 • Within the developed regions, passive car safety systems, seat belts, airbags, and crumple zones have proven essential in decreasing fatalities and serious injuries to the occupants of cars and pedestrians. 被动安全系统已显著降低了事故的损害 • New automotive safety regulation and standard. The automotive industry is under pressure to provide new and improved vehicle safety systems like complex advanced driver assistance systems (ADAS) with accident prediction and avoidance capabilities. 新的汽车安全的立法及标准 TM External Use 2 Advanced Driver Assistance Systems ► Rear/Side Camera, sat. Radar, Usonic @<15kmh ► 3D image techniques and data fusion ► 2.5D and 3D with high quality ► Park assist ► Self parking with safety ► Camera and Radar @>15kmh ► Cognition Algorithms to extract features / classify objects ► No display necessary ► F. Safety applied to longitudinal motion (braking / Steering) e.g. ►Lane Keep Assist ►Adaptive cruise control ►Automatic Emergency braking ►Pedestrian protection e.g. ►Park Assist ►3D Surround View ►Cross traffic Alert ►Blind Spot det. TM External Use 3 ► Object Data @ >15kmh ► 3D Enviornmental Modeling allowing self navigation ► No Display ► Hard safety – Longitudinal and Lateral motion ► Integration of Feature extraction e.g. ►Self-driving Auto ►Sensor Fusion Accident Free Driving is Within Our Sight • Source – Frank Gruson, Continental AG TM External Use 4 技术革新使得我们有信心 在将来可以完全避免交通 事故 Applications for Automotive Radar Are Gro wing AEBS Advanced Emergency Braking System FCW Forward Collision Warning LDW Lane Departure Warning BUA Back up Aid BSD Blind Spot Detection TM External Use 5 Source： ADASE Expected ADAS Regulations and NCAP Ratings AEBS / LDW Mandatory for new trucks > 3.5t FCW/LDW 2009 2010 Mandatory for all new cars Mandatory for new trucks > 3.5t 2011 2012 2013 2014 FCW/LDW NCAP Tests Decided Under Discussions Expected AEBS AEBS / LDW Availability if performances are met (Source NHTSA) 2015 2016 2017 2018 BUA Part of NCAP Star Rating Mandatory for SUVs and Van’s LDW BSD Advanced Emergency Braking System Lane Departure Warning Blind Spot Detection FCW BUA Forward Collision Warning Back up Aid Source: Interpretation of Continental / Freescale Segment External Use 6 2020 FCW/AEBS/LDW/BSD AEBS TM 2019 RADAR: 76-77 GHz ACC Development History 1999 1990 76-77G band proposed 76-77G band regulated 1987-1994 1999 project: PROMETHEUS 1B USD, AICC: “Autonomous Intelligent Cruise Control” 1998 F. Ackermann publication Birthday for ACC 1996 Mitsubishi Diamante ACC (Lidar, Camera) C. Hülsmeyer: Patent 165546 1973 1980 1987 main source: Hermann Winner, “Die lange Entwicklung von ACC”, 2003 TM External Use 7 1990 1995 2002 VW Autocruise Daimler A.D.C 2001 2012 Nissan Omron/A.D.C (Lidar) 1995 1904 1886 1904 Jaguar Delphi Toyota Denso 35 GHz, German project: Daimler, BMW, Bosch, SEL, VDO, AEG-Telefunken Audi Bosch 1999 1980 1973 2003 Nissan A.D.C 2000 BMW Bosch 1999 FSL BiCMOS 2009 IFX SiGe 2009 2012 Overview • • • • • • ADAS Trends and Need for Radar Systems Radar Fundamentals Freescale Radar Solutions MRD2001 Packaged Radar Chipset MPC5775K Microcontroller Summary and Conclusions TM External Use 8 RaDAR (Radio Detection And Ranging) relative velocity vR = 0 relative velocity vR ≠ 0 Distance R RADAR RADAR Dt Dt = 2 R / c0 TM External Use 9 Doppler Shift RaDAR (Radio Detection And Ranging) relative velocity vR = 0 relative velocity vR ≠ 0 Distance R RADAR RADAR Dt Dt = 2 R / c0 TM External Use 10 Doppler Shift FMCW (Frequency Modulated Continous Wave) • • • • FMCW operation is independent of the speed or direction of travel of the target high precision FMCW is less complex, safer and lower cost (compared to pulse systems) FMCW gives low false alarm rates FMCW sees a higher percentage of valid targets TM External Use 11 FMCW – Advanced System • • • Digital Beam Forming (DBF) − antenna arrays required − Dj is the phase difference of received IF signals from different antennae − atarget is the angle at which the target appears w/r to the sensor axis − 3 dB beamwidth Dq3dB = l/2L (L is defined by “footprint” of antenna array) Electronically Steerable Arrays (ESA) − adaptive beam forming − establised in military applications Synthetic Aperture Radar (SAR) − multiple Rx and Tx antennae − reduced Dq3dB at same antenna footprint L These Trends Drive More Tx and Rx Channels in Radar Chipsets TM External Use 12 Overview • • • • • • ADAS Trends and Need for Radar Systems Radar Fundamentals Freescale Radar Solutions MRD2001 Packaged Radar Chipset MPC5775K Microcontroller Summary and Conclusions TM External Use 13 SiGe BiCMOS 77GHz Radar Chipsets System Integration 3 ch RX + BB 4 ch TX + PLL 4 ch RX 1 ch TX VCO Single Channel TX • Industry’s first 77 GHz radar IC supporting fast modulation • Single channel with integrated TX, PA, and VCO • Superior temperature stability Tranceiver Chipset • Industry’s first 77GHz SiGe BiCMOS radar PLL + prog chirp generator • Multi-channel 4 TX + 4 to 16 RX enables wide FOV, ESR, multi-scan modes • Compatible with all leading MCU 2 ch TX Packaged Transceiver Chipset • Ultra-low power ~ 2.5W • Scalable to 4 TX + 12 RX • Supports fast modulation with simultaneous active TX • High integration including baseband VGA + filters • Built-in system test enables compensation & calibration for PCB, temperature variations • Optimized with Freescale MPC5775K radar processor FRDxX1050x MRD2001 FRDxX1050x 2013 2012 TM External Use 14 VCO 2014 FRDxX1050x 77GHz Radar Transceiver Chipset 4chTxPLL 4chRx PA PA PA PA LO Generation PA LO Generation Power DAC Splitter DAC, Power VCO Control PLL PLL SPI, VCO Supply SPI,Test Supply, Test FRDxX1050x Chipset Differentiating Points • Highly integrated 77GHz automotive radar chipset supports up to 4Tx and 16 Rx channel configurations for 2D, 3D, DBF, and SAR automotive radar applications • Supports slow and fast modulation to 10 MHz / 100 ns • Fully integrated PLL and chirp generator programmed via SPI along with Tx power level, channel activation, & state machine control • Designed for integration with a multitude of microprocessors including the Freescale MPC567xK TM External Use 15 Overview • • • • • • ADAS Trends and Need for Radar Systems Radar Fundamentals Freescale Radar Solutions MRD2001 Packaged Radar Chipset MPC5775K Microcontroller Summary and Conclusions TM External Use 16 MRD2001 77GHz Packaged Radar Chipset The MRD2001 chipset is a scalable radar solution for high end and low end ADAS applications, industrial safety, security, and robotics Differentiating Points Typical Application Diagram • Advanced packaging technology with BGA format • Scalable to 4 TX channels and 12 RX channels • Activate simultaneous Tx channels for electronic beam steering • Supports fast modulation at 100 MHz / 100 ns • Integrated baseband filter and VGA saves system bill-of-materials cost • Designed for integration with MPC577xK microprocessor TM External Use 17 Common Features for Packaged Parts • • • • • • • • 6 mm x 6 mm BGA package (0.5 mm pitch) Only most outer 2 rows are used for control signals Temperature Range -40°C up to 125°C (ambient) Temperature Sensor Power/Peak Detector SPI Control (max. guaranteed 10 MHz) Tri-State Sense Output (One Signal Line can be shared) “Software” Addressing of Chips instead of dedicated hardwired “chip select” TM External Use 18 Overview • • • • • • ADAS Trends and Need for Radar Systems Radar Fundamentals Freescale Radar Solutions MRD2001 Packaged Radar Chipset MPC5775K Microcontroller Summary and Conclusions TM External Use 19 Benefits of Integration MPC5675K System MPC5775K System Performance– MPC5775K offers topperformance for intense computational tasks with key integrated digital accelerators Safe –Built on proven safe technology it delivers a scalable, well documented, process compliant safe architecture and safe Software TM External Use 20 Integration & Cost – Right balance of memory, large number of Analogue IP designed for Radar, FFT accelerator. Drive Miniaturization and BOM saving Flexible – can be used in all applications and with all Front End Radar sensor technology and types. Qorivva MPC5775K MCU Overview CPU Platform • 266 MHz Power ISA Dual Issue core multi core system • Two z4 Cores in permanent delayed Lockstep for high safety integrity level • Two z7 cores for application execution • I-cache – 16 KB (2 ways) / D-Cache 16 KB (2 ways) • Core Local D-memory (64kB at each core) with local MPU • Vector Floating Point Unit & SIMD (z7) • 64 bit BIU with E2E ECC Radar Processing Platform • Signal Processing Toolbox (SPT) FFT accelerator, SDMA, PDMA •8x Integrated ΣΔ-ADC with 5 MHz bandwidth and internal sampling clock of 320 MHz. •12-bit resolution DAC with maximum of 2Msps •Low jitter 320Mhz PLL for RADAR Memory • Up to 4 MBytes byte Flash with EE Emulation and ECC • Up to 1.5 MBytes SRAM with ECC • Safe Crossbar (E2E ECC) with system MPU Vehicle & ECU communication • 4 x FlexCAN (64 message buffers) • 1 x FlexRay (Dual Channel 128 msg. buffers) • 1 x Ethernet Controller (ENET) • 4 x LINFlex (SCI) & 3x IIC • 4 x dSPI (4cs std / 8cs in larger v package version only) • 3 x eTimer • 2 x FlexPWM (2x 12 channel) & 2x CTU • Octal A/D (10 M samples/sec) SD Radar I/F – 5MHz BW + 4x SAR • 2 x SENT System • Highly stable Oscillator for Radar ASIC to A/D synchronization • SIPI (~300MBaud) for interprocessor or mc to ASIC communication • Safe DMA Engines • Autonomous Fault Collection and Control Unit • CRC computing unit • Junction temperature sensor • Nexus Class 3+ debug interface (Aurora extension) TM External Use 21 RADAR Timing Generation Sample received RADAR echoes 10MSps/12bit 8x ΣΔ-ADC with 5 MHz bandwidth and an Input signal from MRD2001 internal sampling clock of 320 MHz – 69dB SNR A C Q ADC ADC ADC fast DMA SPT SRAM events Control signal to MRD2001 G P I O • • • CS acquisition window eDMA ctep CTE run, hold, reset eDMA 0.004 DACout(t) 0.003 DAC 0.001 0 2 10 5 4 10 5 t 6 10 5 8 10 5 1 10 4 A new best-in-class 12-bit resolution DAC which has maximum of 2Msps TM External Use 22 Timing Table[N] Timing Table[N+1] Output signal to MRD2001 0.002 chirp[N] chirp[N+1] WGM Waveform[N] Waveform[N+1] SPT Operation Principle Command list for signal processing Configures and controls SPT Runs specialized signal processing tasks on SPE Buffered ADC samples FFT data Peak lists Sample received RADAR echoes 10MSps/12bit Timing definition RADAR Timing Generation TM External Use 23 Fast Chirp Sequence Doppler Radar f(t) Chirps t Doppler (Speed) ADC 1.N Range Range FFT FFT Range Gate (Distance) TM External Use 24 Fast Chirp Sequence Doppler Radar Doppler FFT SRAM PDMA Doppler (Speed) Peak List Range Gate (Distance) TM External Use 25 Signal Processing z7 Cores Radar Algorithm Mapping TM External Use 26 Algorithm Partitioning TM External Use 27 SPT Features • • Acquisition Block (SDMA) − Hardware Accelerator − Channel muxing—Sample re-ordering to simplify PCB routing − Sample DMA—Merging ADC samples into memory words, arranging the data into packets, and distributing to memory locations FFT − COPY • Programmable DMA (PDMA) − Transfers data between the system RAM/Flash/TCM to operand RAM or twiddle RAM (SPT internal RAMs) and vice-versa − Performs special packing and unpacking schemes on the fly, for reduced storage • Memory − Radix4 and Radix2 butterfly and twiddle multiplication Windowing for pre- and post-multiplication with coefficients Primarily moves data from one location to another Can transpose and pack complex data and manipulate real/imaginary parts Command Sequencer The command sequencer reads and interprets instructions in the command queue and triggers the operation specific scheduler depending on the instruction • CPU interaction • Debug Support − Operand RAM stores the operands for operations like FFTs − Twiddle RAM stores constants like coefficients used in FFT operations − Work registers store single values for calculation (such as coefficients) TM External Use 28 Safety Features • As part of the Freescale SafeAssure program, the MCP5775K MCU has been designed with two highperformance Power Architecture®e200z7 cores for signal processing and can help car manufacturers achieve a minimum ISO 26262 Automotive Safety Integrity Level-B (ASIL-B). • In addition to supporting the requirements of automotive functional safety applications, there are two e200z4 cores in a lockstep configuration specifically designed for decision-making and safety-critical requirements, helping to achieve ISO 26262 ASIL-D certification. • Some additional key safety features include online logic built-in self-test (LBIST) and memory built-in self-test (MBIST), End-to-End error-correcting code (ECC), clock and power generation supervisor, and a failure-handling module—which also enable customers to obtain ASIL-D certification. TM External Use 29 Summary and Conclusions • Radar is a critical element in ADAS solutions for future automobiles • The use of SiGe BiCMOS packaged radar solutions allows the realization of low cost, multi-channel 77/79 GHz scalable chipsets • The MRD2001 chipset was specifically designed to interface with the MPC5775K microprocessor to form a complete scalable radar system (Tx and Rx) with few additional components TM External Use 30 Questions? TM External Use 31 Designing with Freescale Tailored live, hands-on training in a city near you 2014 seminar topics include • QorIQ product family update • Kinetis K, L, E, V series MCU product training freescale.com/DwF TM External Use 32 TM www.Freescale.com © 2014 Freescale Semiconductor, Inc. | External Use
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