DSP/DAC - Ethernet Alliance

The Ultimate Archetype 100 GbE per Lambda Technology
Ilya Lyubomirsky and William A. Ling
OIDA and Ethernet Alliance
100GbE per Lambda for Data Center Workshop
June 12, 2014
Outline
Key Messages

Archetype 100 GbE per Lambda System Architecture
 Digital Modulation Techniques
 100 GbE per Lambda for WDM Single-Mode Fiber Systems
 100 GbE per Lane for Parallel Multi-Mode Fiber Systems
 Conclusions
100GbE per Lambda for Data Center Workshop 2014
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100GbE per Lambda System Design Space
Key Messages








Device Technology: InP, SiP
Transmitter: DML, EML, MZM
Baud Rate: 25, 50,100 Gbaud
Modulation: PAM, DMT, QAM, CAP, etc.
Impairments: Thermal Noise, Laser RIN, DAC/ADC
Quantization, Nonlinearities, RF Imperfections, Dispersion
Equalization: CTLE, FFE/DFE, FFT/IFFT, MLSE
FEC: Coding Gain, Latency, Power
Engineering Tradeoffs: Cost, Power, Density, Reach
How to proceed?
100GbE per Lambda for Data Center Workshop 2014
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Who Is Your Archetype?
Hero
Ruler
Magician
Rebel
Sage
Source: http://www.soulcraft.co/essays/the_12_common_archetypes.html
100GbE per Lambda for Data Center Workshop 2014
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Archetype 100 GbE per Lambda System Architecture
Complexity
in Tx DSP
Simple Efficient Optics
Complexity
in Rx DSP
SMF
(or MMF)
DSP DAC
LDD
DML
PD
TIA
ADC DSP
DFB 1310nm
(or VCSEL 850nm)
25.8 Gb/s DFB
28 Gb/s VCSEL
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400GbE 4-Lambda SMF Module Concept
CDR
5
CDR
CDR
SerDes
DSP/DAC
LD
DML
DSP/DAC
LD
DML
DSP/DAC
LD
DML
DSP/DAC
LD
DML
4:1
LAN
WDM
SMF
4:1
LAN
WDM
SMF
TEC
5
SerDes
DSP/ADC
TIA
DSP/ADC
TIA
PIN
DSP/ADC
TIA
PIN
DSP/ADC
TIA
PIN
PIN
IEEE 802.3bs SMF
CDAUI 8x50G lanes
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What is the Best 100G Modulation Format for DML?
 Pulse
Amplitude Modulation (PAM-M)
 Discrete Multi-Tone Modulation (DMT)
 Quadrature Amplitude Modulation (QAM)
 Carrierless Amplitude Phase (CAP)
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Discrete Multi-Tone (DMT) Modulation
Header
Key Messages
Message
1
Bullet
style
Message
2
 Bullet
style
System
Response
Message
3
 RF
Bullet
style
+ DML

Each subcarrier samples only a small
portion of system frequency response
 Very resilient to amplitude and
phase ripples
100GbE per Lambda for Data Center Workshop 2014
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Quadrature Amplitude Modulation (QAM)
Header
Key Messages
Conventional QAM32



Message
1
Bullet
style
Message
2
Bullet
style
Message
3
Bullet
style
Optimized for DFB Tx
Source: W. Ling, I. Lyubomirsky, O. Solgaard, “Digital Quadrature
Amplitude Modulation with Optimized Non-Rectangular
Constellations for 100 Gb/s Transmission by a Directly-Modulated
Laser,” Optics Express, Vol. 22, Issue 9, pp. 10844-10857, 2014
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Modulation Comparison Back-to-Back (B2B)
1.E-01
DMT
PAM4
QAM32
QAM31 Optimum
BER
1.E-02
1.E-03
IEEE 802.3bj PAM4 FEC
1.E-04
1.E-05
-9
-8
-7
-6
-5
-4
-3
-2
-1
0
1
Rx Average Power (dBm)
100GbE per Lambda for Data Center Workshop 2014
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Modulation Comparison with 10km SMF Dispersion
1.E-01
DMT
Dispersion = 10 ps/nm
PAM4
QAM32
BER
1.E-02
1.E-03
IEEE 802.3bj PAM4 FEC
1.E-04
1.E-05
-9
-8
-7
-6
-5
-4
-3
-2
-1
0
1
Rx Average Power (dBm)
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Modulation Comparison with RF Ripple
1.E-01

f 
ILripple  A cos 2 

f p 

A = 1 dB
DMT
PAM4
QAM32
fp = 2 GHz
BER
1.E-02
1.E-03
IEEE 802.3bj PAM4 FEC
1.E-04
-9
-8
-7
-6
-5
-4
-3
-2
-1
0
1
Rx Average Power (dBm)
100GbE per Lambda for Data Center Workshop 2014
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Modulation Comparison Summary
PAM4
DMT
QAM
B2B Rx Sensitivity
Dispersion
RF Imperfections
Power Dissipation
Latency
green = good
yellow = ok
red = potential trouble
100GbE per Lambda for Data Center Workshop 2014
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400GbE Parallel MMF Module Concept
CDR
5
CDR
CDR
5
SerDes
SerDes
DSP/DAC
LD
VCSEL
DSP/DAC
LD
VCSEL
DSP/DAC
LD
VCSEL
DSP/DAC
LD
VCSEL
DSP/ADC
TIA
PIN
DSP/ADC
TIA
PIN
DSP/ADC
TIA
PIN
DSP/ADC
TIA
PIN
IEEE 802.3bs MMF
CDAUI 8x50G lanes
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VCSEL DMT Experiment
OM3
Fiber
Mode
Mixer
DMT
Tx DSP
DAC
56 Gs/s
DMT
Rx DSP
ADC
80 Gs/s
MM PD
+ TIA
850nm
VCSEL
100
OM3 Transfer Functions
CMOS DAC
90
Micram SiGe DAC
Bit Rate (Gb/s)
80
70
60
50
40
30
20
0
50
100
150
200
250
300
350
OM3 Distance (m)
Source: I. Lyubomirsky, et. al. “56 Gb/s Transmission over 100m OM3 using 25G-class VCSEL and Discrete
Multi-Tone Modulation,” OIC, paper TuC2, Coronado, CA, May, 2014
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Simulation Study on Feasibility of 100 GbE VCSEL
Max. Bit Rate at BER = 10-3 achievable with DMT
DAC/ADC ENOB = 6 bits
110
5
Prx = -3 dBm
Prx = 0 dBm
Response (dB, electrical)
120
VCSEL small signal response
90
80
70
-5
-10
-15
0
5
10
15
20
25
30
Frequency (GHz)
60
-120
50
40
-155
-150
-145
-140
RIN (dB/Hz)
-135
-130
-125
Power/frequency (dB/Hz)
Bit Rate (Gb/s)
100
0
VCSEL RIN
-135 dB/Hz
-130 dB/Hz
-140 dB/Hz
-125
-130
-135
-140
-145
-150
0
5
10
15
20
25
30
Frequency (GHz)
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Next Step: Activate your 100GbE Archetype
“Are there people in legend, history, mythology or
religion that truly inspire you? Study them, and then
become them.”
- Deepak Chopra
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