APPLICATION NOTE
Design Optimization for a Low-Power
SAMA5D3-based System
Atmel | SMART SAMA5D3 Series
Introduction
The Atmel ® | SMART SAMA5D3 series is a high-performance, power-efficient
embedded MPU. It features reduced power consump tion, making it an ideal
platform for low-power applications, such as battery-powered devices.
This application note provides techniques to optimize the design of a SAMA5D3based system in order to achieve the lowest power consumption possible.
The application note consists of three sections:

Section 1 introduces the SAMA5D36 CPU Module Power Consumption
(CMP) board and its Linux demo.

Section 2 presents the overall power consumption of SAMA5D36 in
different modes, including Low-power mode and Active mode.

Section 3 explains how to optimize the power consumption for a SAMA5D3based system.
This application note should be used in conjunction with the SAMA5D3 Series
datasheet available on www.atmel.com.
SMART
Atmel-11291A-ATARM-Low-Power-Design-for-SAMA5D3-based-Systems-Application-Note_23-Jun-14
Table of Contents
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.
SAMA5D36-CMP Board and Linux Demo . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1
1.2
1.3
2.
Power Consumption under Linux Scenarios . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
3.
SAMA5D36-CMP Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Linux Demo . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Source Code Extraction and Building . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Low-power Modes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Linux Idle. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Dhrystone . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Audio . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
LCD Controller (LCDC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Image Sensor Interface (ISI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Gigabit EMAC (GMAC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
USB Host . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Power Optimization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.1
3.2
Optimizing Power Consumption of the SAMA5D36 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Optimizing Power Consumption of External Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
4.
Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5.
FAQ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Appendix A. SAMA5D36-CMP Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
6.
2
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]
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1.
SAMA5D36-CMP Board and Linux Demo
1.1
SAMA5D36-CMP Board
SAMA5D36-CMP board (see Figure 1-1) is a CPU module designed to measure the power consumption of the
SAMA5D36 device.
For complete schematics of the SAMA5D36-CMP RevC, refer to the appendix.
Note: Before using the CMP board, check the settings of all jumpers to ensure that they are in the default state as
illustrated in Figure 1-2.
The CMP board is a CPU module (CM) board to be used in conjunction with the SAMA5D3-EK main board (MB).
The main differences between the CMP board and the CM board are the jum pers that measure the power
consumption of ea ch rail of th e SAMA5D36 product, the use of LPD DR2 instead of DDR 2, and the power
management IC (PMIC).
Figure 1-1.
SAMA5D36-CMP Overview
32Mb
Serial Flash
256MB
NAND Flash
SAMA5D36
512MB LPDDR2
32bit
128Mb
NOR Flash
Power Button
Rail Jumpers
KSZ9031RN
Ethernet PHY
PMIC
ATC8865
1Kb
EEPROM
SAMA5D36-CMP
1.1.1
Jumper Settings
With one jumper on each power rail of the SAMA5D36 device, the CMP board features more jumpers than the CM
board, thus offering more precise measurement capabilities than the CM. This makes it possible to measure the
current of each power rail, thus facilitating the overall power consumption investigation/analysis of the SAMA5D36
and external devices. This is of particular importance for low-power applications.
For detailed jumper settings on the CMP board, please refer to Figure 1-2.
1.1.2
Low-Power DDR2 (LPDDR2)
Low-power DDR2 memory (MT42L128M32D1GU-25 WT) is used on the CMP board instead of DDR2, which is
used on the CM board. Its low -power advantage makes LPDDR2 a good memory replacement in low-power
system design.
1.1.3
Power Management IC (PMIC)
The Active-Semi ACT8865 is the power management IC (PMIC) implemented on the CMP board. It supplies all the
on-board components including the CPU and the memories, making it a complete and highly-efficient power
management solution.
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Figure 1-2.
CMP Default Jumper Settings
REFERENCE
DEFAULT
FUNCTION
4
JP2
CLOSE
VDDCORE
PAGE
4
JP3
CLOSE
VDDUTMIC
4
JP4
CLOSE
VDDPLLA
4
JP6
CLOSE
VDDIOM_MPU
4
JP7
CLOSE
VDDBU
4
JP8
CLOSE
VDDIOP1_MPU
4
JP9
CLOSE
VDDIOP0_MPU
4
JP10
CLOSE
FUSE_2V5
4
JP11
CLOSE
VDDUTMII
4
JP12
CLOSE
VDDOSC
4
JP13
CLOSE
VDDANA
4
JP14
OPEN
CM-3V3 to MB-3V3
4
JP15
CLOSE
VDDIODDR_MPU_1V2
4
JP17
CLOSE
VCC_5V
4
JP18
CLOSE
VCC_1V8
4
JP19
CLOSE
VCC_3V3
4
JP20
CLOSE
VDDIOP1_GPHY
4
JP21
CLOSE
VDDIODDR_1V2
4
JP22
CLOSE
VCC_1V2
7
JP1
OPEN
Disable SPI0_NPCS0 for Dataflash
9
JP16
2-1
GPHY 1V2 from VCC_1V2
2-3
GPHY 1V2 from PMOS
The CMP board is fully compatible with the Atmel SAMA5D3-EK evaluation kit. It can be used as a seamless
replacement for the CM board of the Atmel SAMA5D3-EK, and functions with the main board (MB) and display
module (DM) board. In this application note, we develop a power consumption demonstration platform by replacing
the CM with a CMP in the standard SAMA5D3-EK, as shown in Figure 1-3.
Note: The CMP board is not for public sale. It is intended only for internal engineering purposes. For more
information on the CMP board, please contact your local Atmel representative or FAE.
Figure 1-3.
Power Consumption Demo Platform
CMP
DM
MB
Note: For more details on the SAMA5D3-EK, refer to the SAMA5D3 Series Evaluation Kit User Guide available on
www.atmel.com.
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1.2
Linux Demo
The SAMA5D36-CMP board is delivered with a default Linux demo stored in the on-board NAND Flash. At powerup, in connection with the SAMA5D3x-MB and SAMA5D3x-DM boards, the demo starts running and plays a video.
The default Linux demo code together with this application note can be downloaded from:
ftp://ftp.linux4sam.org/pub/demo/sama5d36-cmp/
The demo archive contains:

All component binaries:
sama5d3xek-nandflashboot-uboot-3.6.1.bin, u-boot.bin, sama5d36ek_cmp.itb, rootfs-sama5d3xek.ubi

A TCL/SAM-BA script that interfaces with the SAM-BA tool to flash the demo:
sama5d3xek_demo_linux_nandflash.tcl

A .bat script able to run the flashing script calling SAM-BA itself:
sama5d3xek_demo_linux_nandflash.bat
The Atmel SAMA5D36 integrates the full peripheral set available for the SAMA5D3 series, including an LCD
controller, touch screen interface, CMOS sensor interface, Gigabit EMAC, 10/100 EMAC and a high-speed USB
host and device. The default Linux demo for the SAMA5D36-CMP is designed for the evaluation of these
peripherals. In addition, the demo has been designed to support the MB RevC/D/E, a nd any of the display
modules, either the 5" with resi stive touchscreen, the TM4300 or the TM700 from PDA with capacitive
touchscreen..
If the on-board NAND Flash has been erased, the user may need to re-flash the default demo. To do so, follow the
procedure below:
Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]
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1.
Set up drivers/software environment by installing:
̶
JLink (\tools\Jlink\Setup_JLinkARM_V450j.zip): SAM-ICE driver
̶
JLinkCDC (\tools\Jlink OB DBGU\JLinkCDCInstaller_V1_2b.zip): USB serial port driver for debug
information display
SAM-BA (\tools\SAM-BA2.12\sam-ba_2.12.zip): a tool used to program the on-board memory
̶
SAM-BA patch (tools\SAM-BA2.12\sam-ba_2.12_patchsama5d3xcmp.zip)
̶
(Note: SAM-BA 2.12 formal release is for SAMA5D3-EK with DDR2 on CM board. To support the CMP board with
LPDDR2, a patc h needs to be appli ed. Extract the .zip patch file and unz ip i t, run samba_2.12_patchsama5d3xcmp.exe by double-clicking it to apply the SAM-BA patch.)
2.
Build the demo platform:
̶
Double-check the connection of the CM with the MB and the DM to make sure they are properly
connected and all jumpers are correctly set.
̶
Press PB4 CS_BOOT button to de-select the on-board serial Flash and the NAND Flash. Insert a 5V
power supply to power-up the demo board.
Connect the demo board through J20 USB-A to the PC with a micro-USB cable.
̶
Check “Device Manager->Ports (COM & LPT)”. If “AT91 USB to Serial Converter (COMx)” appears,
then the USB connection between the demo board and PC is working.
̶
3.
Download and program:
Unzip the demo package (\demo\linux4sam-buildroot-sama5d3xek-cmp-demo-v1.0.1.zip). In the
demo archive, run sama5d3xek_demo_linux_nandflash.bat by double-clicking it to flash the on-board
memory.
̶
A log file (logfile.log) will pop up upon completion of demo flashing.
̶
4.
Run the demo:
Re-plug the 5V power supply to run the Linux demo on the demo board.
̶
Use a micro-USB cable to connect the demo board through J14 to the PC, and open a hyperterminal
console window as (115200-8-N-1).
̶
On the console window, type “root” to log in:
̶
Welcome to Buildroot
buildroot login: root
#
1.3
Source Code Extraction and Building
a) At91bootstrap:
Github: https://github.com/at91linux/at91bootstrap.git
Branch: wya/at91bootstrap-3.x-cmp
TAG: sama5d3x_cmp_v1.0
Commands to build binary:
# make sama5d3xeknf_cmp_uboot_defconfig
# make
Generated file:
sama5d3xek-nandflashboot-uboot-3.6.1.bin
b) u-boot:
Github: https://github.com/at91linux/u-boot-at91.git
Branch: u-boot-2013.07-at91-cmp
TAG: sama5d3x_cmp_v1.0
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Commands to build binary:
# make sama5d3x_cmp_nandflash
Generated file:
u-boot.bin
c) Linux:
Github: git://github.com/at91linux/linux-at91.git
Branch: wya/linux-at91-cmp
TAG: sama5d3x_cmp_v1.0
Commands to build binary:
# ./build_cmp_all.sh
Generated file:
sama5d36ek_cmp.itb
d) buildroot (the same as SAMA5D3 series release):
Github: git://github.com/linux4sam/buildroot-at91.git
Branch: buildroot-2013.02-at91
Commands to build binary:
# make sama5d3ekdemo_defconfig
# make
Generated file:
rootfs-sama5d3ek.ubi
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2.
Power Consumption under Linux Scenarios
The SAMA5D3 series is based on the ARM ® Cortex™-A5 processor and offers a good balance between
performance and power consumption. Typical application scenarios have been selected to illustrate the high
performance levels of the SAMA5D3, its rich connectivity and multimedia features and its low power consumption.
This section gives a detailed description of each scenario, as well as the typical power consumption data for each.
All power consumption data were measured based on:

HW demo board: default demo platform (RevD MB+5” LCD+RevC CMP)

SW demo package: linux4sam-buildroot-sama5d3xek-cmp-demo-v1.0.1.zip

Measurement equipment: Agilent 34410A 6(1/2) Digit Multimeter
The power consumption data may vary slightly depending on the revision of the MB, the LCD, the CMP and the
measurement equipment used.
Note: In some cases, the “top” comm and is used to get the real-tim e CPU usage value (%), which is (1CPU_idle%).
# top
Mem: 21008K used, 492708K free, 0K shrd, 0K buff, 6520K cached
CPU: 36% usr
0% sys
0% nic 63% idle
0% io
0% irq
0% sirq
For example, in the above log information, if the CPU idle percentage is 63%, then the CPU usage value is 37%.
2.1
Low-power Modes
In most cases, at least two low-power modes must be implemented in an operating system – Standby mode and
Suspend mode.
In Standby mode, the SAMA5D3 is in Idle mode, and the core is in Wait for Interrupt mode. Most peripherals are
still enabled and running. The internal bus is in High-speed mode for fast system restoration.
In Suspend mode, the SAMA5D3 is in Ult ra-low-power mode with a 512 Hz MCK. The core is in Wait for Interrupt
mode, and most peripherals are disabled and not running. The internal bus is set to Low-spe ed mode for further
power savings.
To build this scenario, stop auto-boot in U-Boot and set loader options for this case:
U-Boot 2013.07-00054-gd757001 (Feb 25 2014 - 14:03:56)
CPU: SAMA5D36
Crystal frequency:
12 MHz
CPU clock
:
528 MHz
Master clock
:
132 MHz
DRAM: 512 MiB
NAND: 256 MiB
In:
serial
Out:
serial
Err:
serial
Net:
No ethernet found.
Hit any key to stop autoboot: 0
U-Boot>setenv bootcmd 'nand read 0x22000000 0x00200000 0x00400000; bootm
0x22000000#conf@sama5d36ek_pm'
U-Boot>boot
After the operating system starts up, log in and type commands to enter the system into the low-power modes
separately:
Welcome to Buildroot
buildroot login: root
# echo standby >/sys/power/state
// echo mem >/sys/power/state
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Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]
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PM: Syncing filesystems ... done.
Freezing user space processes ... (elapsed 0.01 seconds) done.
Freezing remaining freezable tasks ... (elapsed 0.01 seconds) done.
LDO_REG7: No configuration
LDO_REG6: No configuration
FUSE_2V5: No configuration
VDDANA: No configuration
Suspending console(s) (use no_console_suspend to debug)
PM: suspend of devices complete after 218.937 msecs
PM: late suspend of devices complete after 0.407 msecs
PM: noirq suspend of devices complete after 0.391 msecs
The power consumption data for each power rail of the SAMA5D36 is listed below for reference.
Use Case: Low Power Modes (command: echo standby > /sys/power/state) (command: echo mem > /sys/power/state)
Operation Setting: LPDDR2 in self-refresh mode
Used Peripheral: NAND, DBGU, MPDDRC, GPIO
Suspend to Mem
Standby (MCK=PCK=132MHz)
(MCK=PCK=512Hz=32768Hz(osc)/64)
Power Rail
VDDCORE(JP2)
VDDIODDR(JP15)
VDDIOM(JP6)
VDDIOP0(JP9)
VDDIOP1(JP8)
VDDBU(JP7)
VDDUTMIC(JP3)
VDDUTMII(JP11)
VDDPLLA(JP4)
VDDOSC(JP12)
VDDANA(JP13)
VDDFUSE(JP10)
Total
Notes:
1.
2.
Voltage Range
(V)
1.1 ~ 1.32
1.7 ~ 1.9
1.14 ~ 1.30
1.65 ~ 1.9
3.0 ~ 3.6
1.65 ~ 3.6
1.65 ~ 3.6
1.65 ~ 3.6
1.1 ~ 1.32
3.0 ~ 3.6
1.1 ~ 1.32
1.65 ~ 3.6
3.0 ~ 3.6
2.25 ~ 2.75
Voltage (V)
Current (mA)
1.15
29.69
Power
Consumption
(mW)
34.14
1.15
0.0017
0.00
Current (mA)
Power Consumption
(mW)
0.36
0.41
0.0016
0.00
3.3
0.0061
0.02
0.0061
0.02
3.3
3.3
3.25
1.15
3.3
1.15
3.3
3.32
2.51
0.0076
0.0046
0.0022
0.0095
0.0001
7.73
0.43
0.0032
0.0001
0.03
0.02
0.01
0.01
0.00
8.89
1.42
0.01
0.00
45
0.0076
0.0046
0.0022
0.0014
0.0001
0.0002
0.0001
0.0032
0.0001
0.03
0.02
0.01
0.00
0.00
0.00
0.00
0.01
0.00
0.50
For Linux Standby mode, the SAMA5D36 is in Idle mode, while some peripherals such as the timer, DDR2
controller and DBGU serial port must be enabled.
For Linux Suspend mode, the SAMA5D36 is in ULP (Ultra-low-power) 512 Hz mode. In the SAMA5D3 series
datasheet, the power consumption for ULP 512Hz is given as 1.2V × 0.40 mA. In this case, due to the lower
supply voltage (1.15V), the actual power consumption is 1.15V × 0.36 mA.
Touch the keypads on the DM board to wake up the demo. The system will resume all the suspended drivers and
print the wake-up time on the hyperterminal:
PM: noirq resume of devices complete after 0.315 msecs
PM: early resume of devices complete after 0.358 msecs
PM: resume of devices complete after 180.424 msecs
Restarting tasks ... done.
Vddcore suspend finish voltage 1250mV
#
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2.2
Linux Idle
In this scenario, the Linux system is running without any workload (CPU usage is close to 0). Power consumption
for this scenario is measured as the reference for other scenarios. By comparison, we can see how the current
changes on each power rail when special features are enabled and in use.
To build up this scenario, stop auto-boot in U-Boot and set loader options for this case:
Hit any key to stop autoboot: 0
U-Boot>setenv bootcmd 'nand read 0x22000000 0x00200000 0x00400000; bootm
0x22000000#conf@sama5d36ek_pm'
U-Boot>boot
After the operating system starts up, log in:
Welcome to Buildroot
buildroot login: root
#
The power consumption data for each power rail of the SAMA5D36 is listed below for reference.
Use Case: Command prompt after login, No application running, no LCD display
Operation Setting: MCK: 132MHz, PCK: 528MHz, LPDDR2: 132MHz
Used Peripheral: NAND, DBGU, MPDDRC
Power
Voltage Range
Power Rail
Voltage (V)
Current (mA)
Consumption
(V)
(mW)
VDDCORE(JP2)
VDDIODDR(JP15)
VDDIOM(JP6)
VDDIOP0(JP9)
VDDIOP1(JP8)
VDDBU(JP7)
VDDUTMIC(JP3)
VDDUTMII(JP11)
VDDPLLA(JP4)
VDDOSC(JP12)
VDDANA(JP13)
VDDFUSE(JP10)
Total
10
1.1 ~ 1.32
1.7 ~ 1.9
1.14 ~ 1.30
1.65 ~ 1.9
3.0 ~ 3.6
1.65 ~ 3.6
1.65 ~ 3.6
1.65 ~ 3.6
1.1 ~ 1.32
3.0 ~ 3.6
1.1 ~ 1.32
1.65 ~ 3.6
3.0 ~ 3.6
2.25 ~ 2.75
1.25
44.97
56.21
1.25
4.46
5.58
3.3
0.053
0.17
3.3
3.3
3.25
1.25
3.3
1.25
3.3
3.32
2.51
0.0079
0.0046
0.002
0.011
0.0001
8.06
0.43
0.0031
0.0001
0.03
0.02
0.01
0.01
0.00
10.08
1.42
0.01
0.00
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2.3
Dhrystone
In this scenario, Dhrystone, a typical computing benchmark program, is used to evaluate the contribution of the
ARM core to power consumption figures. The Dhrystone program is compiled with the same toolchain as kernel
building. The Dhrystone source code and binary can be extracte d from APP\dhrystone\ at FTP:
ftp://ftp.linux4sam.org/pub/demo/sama5d36-cmp/.
In this case, the CPU usage accounts for almost 99% of the overall power consumption.
To build this scenario, stop auto-boot in U-Boot and set loader options for this case:
Hit any key to stop autoboot: 0
U-Boot>setenv bootcmd 'nand read 0x22000000 0x00200000 0x00400000; bootm
0x22000000#conf@sama5d36ek_dhrystone'
U-Boot>boot
After the operating system starts up, log in:
Welcome to Buildroot
buildroot login: root
#
Insert an SD card containing Dhrystone and copy Dhrystone to NAND Flash:
# mount /dev/mmcblk0p1 /mnt
# cp /mnt/dhrystone ./
Unmount SD card and remove it from the demo board:
# umount /mnt
Run Dhrystone:
# ./dhrystone
The power consumption data for each power rail of the SAMA5D36 is listed below for reference.
Use Case: Active Power Consumption (running Dhrystone: 599DMIPS)
Operation Setting: MCK: 132MHz, PCK: 528MHz, LPDDR2: 132MHz
Used Peripheral: NAND, DBGU, MPDDRC, HSMCI
Power
Voltage Range
Consumption
Power Rail
Voltage (V)
Current (mA)
(V)
(mW)
VDDCORE(JP2)
1.1 ~ 1.32
1.25
130.63
163.29
1.7 ~ 1.9
VDDIODDR(JP15)
1.25
4.46
5.58
1.14 ~ 1.30
1.65 ~ 1.9
VDDIOM(JP6)
3.3
0.053
0.17
3.0 ~ 3.6
VDDIOP0(JP9)
1.65 ~ 3.6
3.3
0.0081
0.03
VDDIOP1(JP8)
1.65 ~ 3.6
3.3
0.0047
0.02
VDDBU(JP7)
1.65 ~ 3.6
3.25
0.0019
0.01
VDDUTMIC(JP3)
1.1 ~ 1.32
1.25
0.011
0.01
VDDUTMII(JP11)
3.0 ~ 3.6
3.3
0.0001
0.00
VDDPLLA(JP4)
1.1 ~ 1.32
1.25
8.05
10.06
VDDOSC(JP12)
1.65 ~ 3.6
3.3
0.43
1.42
VDDANA(JP13)
3.0 ~ 3.6
3.32
0.0032
0.01
VDDFUSE(JP10)
2.25 ~ 2.75
2.51
0.0001
0.00
Total
181
Note:
By comparing this scenario with the “Linux Idle” scenario, we can see that the power consumption contribution of the
ARM core lies only in VDDCORE.
Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]
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11
2.4
Audio
Audio playback is an essential feature for smart devices. In this scenario, the SAMA5D36 is configured to perform
MP3 decoding and playing function.
To build this scenario, stop auto-boot in U-Boot and set loader options for this case:
Hit any key to stop autoboot: 0
U-Boot>setenv bootcmd 'nand read 0x22000000 0x00200000 0x00400000; bootm
0x22000000#conf@sama5d36ek_audio'
----------------------------------------------------------------------------------------------------------------------------------------------------------------------Note: The DTB file in loader options differs for different revisions of the MB.
For RevC MB:
U-Boot>setenv bootcmd 'nand read 0x22000000 0x00200000 0x00400000; bootm
0x22000000#conf@sama5d36ek_revc_audio'
-----------------------------------------------------------------------------------------------------------------------------------------------------------------------
U-Boot>boot
After the operating system starts up, log in:
Welcome to Buildroot
buildroot login: root
#
Insert an SD card containing an MP3 file and launch the following commands:
# mount /dev/mmcblk0p1 /mnt
# cd /mnt
# ls
tellmewhy.mp3
# madplay tellmewhy.mp3
# cd ../
# umount /mnt
The power consumption data for each power rail of the SAMA5D36 is listed below for reference.
Use Case: MP3 Audio Playback (Mp3 file in SD card, 128Kbps, 44.1KHz sample rate,
2 channels)
Operatino Setting: MCK: 132MHz, PCK: 528MHz, LPDDR2: 132MHz
Used Peripheral: NAND, DBGU, MPDDRC, SSC, HSMCI
Power
Voltage Range
Power Rail
Voltage (V)
Current (mA)
Consumption
(V)
(mW)
VDDCORE(JP2)
1.1 ~ 1.32
1.25
55.53
69.41
1.7 ~ 1.9
VDDIODDR(JP15)
1.25
4.73
5.91
1.14 ~ 1.30
1.65 ~ 1.9
VDDIOM(JP6)
3.3
0.042
0.14
3.0 ~ 3.6
VDDIOP0(JP9)
1.65 ~ 3.6
3.3
0.19
0.63
VDDIOP1(JP8)
1.65 ~ 3.6
3.3
2.62
8.65
VDDBU(JP7)
1.65 ~ 3.6
3.25
0.0019
0.01
VDDUTMIC(JP3)
1.1 ~ 1.32
1.25
0.011
0.01
VDDUTMII(JP11)
3.0 ~ 3.6
3.3
0.0001
0.00
VDDPLLA(JP4)
1.1 ~ 1.32
1.25
8.07
10.09
VDDOSC(JP12)
1.65 ~ 3.6
3.3
0.43
1.42
VDDANA(JP13)
3.0 ~ 3.6
3.32
0.0086
0.03
VDDFUSE(JP10)
2.25 ~ 2.75
2.51
0.0001
0.00
Total
96
12
Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]
Atmel-11291A-ATARM-Low-Power-Design-for-SAMA5D3-based-Systems-Application-Note_23-Jun-14
2.5
LCD Controller (LCDC)
This scenario is designed to evaluate the power consumption of the LCD controller, which is typically used fo r
multimedia display. By default, the SAMA5D36-CMP demo launches a video. During video playing, the CPU
usage is approximately 45%, mainly for video software decoding.
To build this scenario, stop auto-boot in U-Boot and set loader options for this case:
Hit any key to stop autoboot: 0
U-Boot>setenv bootcmd 'nand read 0x22000000 0x00200000 0x00400000; bootm
0x22000000#conf@sama5d36ek_lcd'
----------------------------------------------------------------------------------------------------------------------------------------------------------------------Note: The DTB file in loader options differs for different DM.
For PDA 4.3”:
U-Boot>setenv bootcmd 'nand read 0x22000000 0x00200000 0x00400000; bootm
0x22000000#conf@ sama5d36ek_pda4_lcd'
For PDA 7”:
U-Boot>setenv bootcmd 'nand read 0x22000000 0x00200000 0x00400000; bootm
0x22000000#conf@ sama5d36ek_pda7_lcd'
----------------------------------------------------------------------------------------------------------------------------------------------------------------------U-Boot>boot
After the operating system starts up, log in:
Welcome to Buildroot
buildroot login: root
#
The power consumption data for each power rail of the SAMA5D36 is listed below for reference.
Use Case: Video playback (LCDC: base layer, 800*480*24 bits, 45 fps;
480*272 MPEG2, software decoding)
Operation Setting: MCK: 132MHz, PCK: 528MHz, LPDDR2: 132MHz
Used Peripheral: NAND, DBGU, MPDDRC, LCDC, GPIO
Power Rail
VDDCORE(JP2)
VDDIODDR(JP15)
VDDIOM(JP6)
VDDIOP0(JP9)
VDDIOP1(JP8)
VDDBU(JP7)
VDDUTMIC(JP3)
VDDUTMII(JP11)
VDDPLLA(JP4)
VDDOSC(JP12)
VDDANA(JP13)
VDDFUSE(JP10)
Total
Voltage Range
(V)
1.1 ~ 1.32
1.7 ~ 1.9
1.14 ~ 1.30
1.65 ~ 1.9
3.0 ~ 3.6
1.65 ~ 3.6
1.65 ~ 3.6
1.65 ~ 3.6
1.1 ~ 1.32
3.0 ~ 3.6
1.1 ~ 1.32
1.65 ~ 3.6
3.0 ~ 3.6
2.25 ~ 2.75
Voltage (V)
Current (mA)
1.25
85.41
Power
Consumption
(mW)
106.76
1.25
6.44
8.05
3.3
0.14
0.46
3.3
3.3
3.25
1.25
3.3
1.25
3.3
3.32
2.51
12.28
0.0047
0.0029
0.011
0.0001
8.05
0.42
0.0032
0.0001
40.52
0.02
0.01
0.01
0.00
10.06
1.39
0.01
0.00
167
Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]
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13
2.6
Image Sensor Interface (ISI)
This scenario is designed to evaluate the power consumption of the image sensor interface, which is used for
image sensor preview. By defa ult, the SAMA5D36-CMP demo supports several sensor modules including
OV5640/OV2640/OV2643.
To build this scenario, stop auto-boot in U-Boot and set loader options for this case:
Hit any key to stop autoboot: 0
U-Boot>setenv bootcmd 'nand read 0x22000000 0x00200000 0x00400000; bootm
0x22000000#conf@sama5d36ek_isi'
----------------------------------------------------------------------------------------------------------------------------------------------------------------------Note: The DTB file in loader options differs for different revisions of the MB and the DM.
For PDA 4.3”:
U-Boot>setenv bootcmd 'nand read 0x22000000 0x00200000 0x00400000; bootm
0x22000000#conf@sama5d36ek_pda4_isi'
For PDA 7”:
U-Boot>setenv bootcmd 'nand read 0x22000000 0x00200000 0x00400000; bootm
0x22000000#conf@sama5d36ek_pda7_isi'
For RevC MB:
U-Boot>setenv bootcmd 'nand read 0x22000000 0x00200000 0x00400000; bootm
0x22000000#conf@sama5d36ek_revc_isi'
U-Boot>setenv bootcmd 'nand read 0x22000000 0x00200000 0x00400000; bootm
0x22000000#conf@sama5d36ek_revc_pda4_isi'
U-Boot>setenv bootcmd 'nand read 0x22000000 0x00200000 0x00400000; bootm
0x22000000#conf@sama5d36ek_revc_pda7_isi'
----------------------------------------------------------------------------------------------------------------------------------------------------------------------U-Boot>boot
After the operating system starts up, log in:
Welcome to Buildroot
buildroot login: root
#
Stop the default video playing:
# ps
PID
USER
COMMAND
1 root
init
…
619 root
{go.sh} /bin/sh /root/go.sh
620 root
-sh
624 root
gst-launch-0.10 filesrc location=/root/MPEG2_480_272.avi ! avide
629 root
ps
# kill -9 619
(The PID may differ each time)
# kill -9 624
(The PID may differ each time)
Start the image sensor preview:
# ls /sys/class/video4linux
video0
# cat /sys/class/video4linux/video0/name
isi-camera
# gst-launch v4l2src device="/dev/video0" ! video/x-raw-yuv,
width=640,height=480 ! ffmpegcolorspace ! fbdevsink
14
Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]
Atmel-11291A-ATARM-Low-Power-Design-for-SAMA5D3-based-Systems-Application-Note_23-Jun-14
The power consumption data for each power rail of the SAMA5D36 is listed below for reference.
Use Case: Image Sensor preview (Image Sensor: OV5640, VGA 640*480, YUV422)
Operation Setting: MCK: 132MHz, PCK: 528MHz, LPDDR2: 132MHz
Used Peripheral: NAND, DBGU, MPDDRC, ISI, LCDC, GPIO
Power
Voltage Range
Consumption
Power Rail
Voltage (V)
Current (mA)
(V)
(mW)
VDDCORE(JP2)
1.1 ~ 1.32
1.25
79.67
99.59
1.7 ~ 1.9
VDDIODDR(JP15)
1.25
8.16
10.20
1.14 ~ 1.30
1.65 ~ 1.9
VDDIOM(JP6)
3.3
0.13
0.43
3.0 ~ 3.6
VDDIOP0(JP9)
1.65 ~ 3.6
3.3
14.74
48.64
VDDIOP1(JP8)
1.65 ~ 3.6
3.3
0.0045
0.01
VDDBU(JP7)
1.65 ~ 3.6
3.25
0.0075
0.02
VDDUTMIC(JP3)
1.1 ~ 1.32
1.25
0.011
0.01
VDDUTMII(JP11)
3.0 ~ 3.6
3.3
0.0001
0.00
VDDPLLA(JP4)
1.1 ~ 1.32
1.25
8.05
10.06
VDDOSC(JP12)
1.65 ~ 3.6
3.3
0.42
1.39
VDDANA(JP13)
3.0 ~ 3.6
3.32
4.06
13.48
VDDFUSE(JP10)
2.25 ~ 2.75
2.51
0.0001
0.00
Total
184
Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]
Atmel-11291A-ATARM-Low-Power-Design-for-SAMA5D3-based-Systems-Application-Note_23-Jun-14
15
2.7
Gigabit EMAC (GMAC)
iPerf is a tool to measure the maximum bandwidth for TCP and UDP. By default, it is included in the SAMA5D36CMP demo. To proceed, set up the Gigabit Ethernet network and start the measurement.
To build this scenario, stop auto-boot in U-Boot and set loader options for this case:
Hit any key to stop autoboot: 0
U-Boot>setenv bootcmd 'nand read 0x22000000 0x00200000 0x00400000; bootm
0x22000000#conf@sama5d36ek_gmac'
U-Boot>boot
After OS starts up, log in:
Welcome to Buildroot
buildroot login: root
#
Use an Ethernet cable to connect the Gigabit Ethernet ports of both the evaluation kit and the PC, as illustrated
below:
PC
SAMA5D36
Client
Server
EMAC
MAC
GMAC
Set up the evaluation kit as the server with the following commands:
# ifconfig eth0 192.168.3.2
# iperf -u –s
Set up the PC as the client and then start data transfer to the PC with the following commands:
# ifconfig eth0 192.168.3.3
# iperf -u -c 192.168.3.2 -t 120 -i 1 -b 300M
The power consumption data for each power rail of the SAMA5D36 is listed below for reference.
Use Case: Running as iPerf server
Operatino Setting: MCK: 132MHz, PCK: 528MHz, LPDDR2: 132MHz
Used Peripheral: NAND, DBGU, MPDDRC, GMAC
Power Rail
VDDCORE(JP2)
VDDIODDR(JP15)
VDDIOM(JP6)
VDDIOP0(JP9)
VDDIOP1(JP8)
VDDBU(JP7)
VDDUTMIC(JP3)
VDDUTMII(JP11)
VDDPLLA(JP4)
VDDOSC(JP12)
VDDANA(JP13)
VDDFUSE(JP10)
Total
16
Voltage Range
(V)
1.1 ~ 1.32
1.7 ~ 1.9
1.14 ~ 1.30
1.65 ~ 1.9
3.0 ~ 3.6
1.65 ~ 3.6
1.65 ~ 3.6
1.65 ~ 3.6
1.1 ~ 1.32
3.0 ~ 3.6
1.1 ~ 1.32
1.65 ~ 3.6
3.0 ~ 3.6
2.25 ~ 2.75
Voltage (V)
Current (mA)
1.25
95.24
Power
Consumption
(mW)
119.05
1.25
8.38
10.48
3.3
0.062
0.20
3.3
3.3
3.25
1.25
3.3
1.25
3.3
3.32
2.51
0.0079
10.37
0.0019
0.011
0.0001
8.01
0.41
0.0031
0.0001
0.03
34.22
0.01
0.01
0.00
10.01
1.35
0.01
0.00
175
Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]
Atmel-11291A-ATARM-Low-Power-Design-for-SAMA5D3-based-Systems-Application-Note_23-Jun-14
2.8
USB Host
Bonnie++ is a benchmark tool to test hard drive and file system performance. The Bonnie++ source code can be
downloaded for free from http://sourceforge.net/projects/bonnie/. In this case, Bonnie++ is compiled with the same
tool-chain as kernel building. The Bonnie++ source code and binary can be extracted from APP\bonnie\ at FTP:
ftp://ftp.linux4sam.org/pub/demo/sama5d36-cmp/.
To measure the typical power consumption of the USB peripheral, the test must be run from a USB disk. The test
lasts about 30 minutes, depending on the speed of the USB disk. The maximum CPU usage may be as high as
90%.
To build up this scenario, stop auto-boot in U-Boot and set loader options for this case:
Hit any key to stop autoboot: 0
U-Boot>setenv bootcmd 'nand read 0x22000000 0x00200000 0x00400000; bootm
0x22000000#conf@sama5d36ek_usb'
U-Boot>boot
After the operating system starts up, log in:
Welcome to Buildroot
buildroot login: root
#
Plug a USB disk containing the benchmark test (Bonnie++) and launch the following commands:
# mount -t vfat /dev/sda1 /mnt
# cd /mnt
# ls
bonnie++
# ./bonnie\+\+ -d ./test -s 1000 -u 0
Using uid:0, gid:0.
Writing with putc()...done
Writing intelligently...done
Rewriting...done
Reading with getc()...done
Reading intelligently...done
start 'em...done...done...done...
Create files in sequential order...done.
Stat files in sequential order...done.
Delete files in sequential order...done.
Create files in random order...done.
Stat files in random order...done.
Delete files in random order...done.
Version 1.03e
------Sequential Output------ --Sequential Input- --Random-Per Chr- --Block-- -Rewrite- -Per Chr- --Block-- --Seeks-Machine
Size K/sec %CP K/sec %CP K/sec %CP K/sec %CP K/sec %CP /sec %CP
buildroot
1000M 3338 75 6674
1 4191
5 4354 95 21745 21 1318 27
------Sequential Create------ --------Random Create--------Create-- --Read--- -Delete-- -Create-- --Read--- -Delete-files /sec %CP /sec %CP /sec %CP /sec %CP /sec %CP /sec %CP
16
13 95 +++++ +++
196 99
20 96 +++++ +++
45 59
buildroot,1000M,3338,75,6674,1,4191,5,4354,95,21745,21,1318.1,27,16,13,95,++++
+,+++,196,99,20,96,+++++,+++,45,59
# cd ../
# umount /mnt
Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]
Atmel-11291A-ATARM-Low-Power-Design-for-SAMA5D3-based-Systems-Application-Note_23-Jun-14
17
The power consumption data for each power rail of the SAMA5D36 is listed below for reference.
Use Case: Run Bonnie++(Version: 1.03e command: ./bonnie++ -u 0) on USB disk
Operatino Setting: MCK: 132MHz, PCK: 528MHz, LPDDR2: 132MHz
Used Peripheral: NAND, DBGU, MPDDRC, USB Host
Power
Voltage Range
Power Rail
Voltage (V)
Current (mA)
Consumption
(V)
(mW)
VDDCORE(JP2)
1.1 ~ 1.32
1.25
116.01
145.01
1.7 ~ 1.9
VDDIODDR(JP15)
1.25
5.53
6.91
1.14 ~ 1.30
1.65 ~ 1.9
VDDIOM(JP6)
3.3
0.047
0.16
3.0 ~ 3.6
VDDIOP0(JP9)
1.65 ~ 3.6
3.3
0.0085
0.03
VDDIOP1(JP8)
1.65 ~ 3.6
3.3
0.0048
0.02
VDDBU(JP7)
1.65 ~ 3.6
3.25
0.0019
0.01
VDDUTMIC(JP3)
1.1 ~ 1.32
1.25
7.94
9.93
VDDUTMII(JP11)
3.0 ~ 3.6
3.3
22.95
75.74
VDDPLLA(JP4)
1.1 ~ 1.32
1.25
8.04
10.05
VDDOSC(JP12)
1.65 ~ 3.6
3.3
9.93
32.77
VDDANA(JP13)
3.0 ~ 3.6
3.32
0.0033
0.01
VDDFUSE(JP10)
2.25 ~ 2.75
2.51
0.0001
0.00
Total
281
18
Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]
Atmel-11291A-ATARM-Low-Power-Design-for-SAMA5D3-based-Systems-Application-Note_23-Jun-14
3.
Power Optimization
3.1
Optimizing Power Consumption of the SAMA5D36
In this section, we provide techniques to optimize the power consumption of the SAMA5D36 using power rails,
clock settings, peripheral settings, working mode selection and I/O setting.
3.1.1
SAMA5D36 Power Rails
Table 3-1 lists the parts of the SAMA5D36 powered by different power rails. Understanding the power behavior of
these power rails helps to optimize their use. Also, the power consumption parameters provided in the SAMA5D3
series datasheet help to estimate the power consumption of the SAMA5D36 in a real application.
Table 3-1.
SAMA5D3 Power Supplies
Name
Voltage Range,
Nominal
Associated
Ground
VDDCORE
1.1–1.32V, 1.2V
GNDCORE
VDDIODDR
VDDIOM
1.7–1.9V, 1.8V
1.14–1.30, 1.2V
1.65–1.95V, 1.8V
3.0–3.6V, 3.3V
GNDIODDR
Powers
The core, including the processor, the embedded
memories and the peripherals
LPDDR/DDR2 Interface I/O lines
LPDDR2 Interface I/O lines
GNDIOM
NAND and HSMC Interface I/O lines
VDDIOP0
1.65–3.6V
GNDIOP
Peripheral I/O lines
VDDIOP1
1.65–3.6V
GNDIOP
Peripheral I/O lines
VDDBU
1.65–3.6V
GNDBU
The Slow Clock Oscillator, the internal 32 kHz RC
Oscillator and a part of the System Controller
VDDUTMIC
1.1–1.32V, 1.2V
GNDUTMI
VDDUTMII
3.0–3.6V, 3.3V
GNDUTMI
The USB device and host UTMI+ interface
VDDPLLA
1.1–1.32V, 1.2V
GNDPLL
The PLLA cell
VDDOSC
1.65–3.6V
GNDOSC
Main Oscillator Cell and PLL UTMI. If PLL UTMI or USB is
used, the range is to be 3.0V to 3.6V.
VDDANA
3.0–3.6V, 3.3V
GNDANA
Analog-to-Digital Converter
VDDFUSE
2.25–2.75V, 2.5V
GNDFUSE
The USB device and host UTMI+ core
The UTMI PLL
Fuse box for programming.
It can be tied to ground with a 100 Ω resistor for fuse
reading only.
3.1.1.1 VDDCORE
VDDCORE powers the processor, embedded memories and all peripherals.
The SAMA5D3 features three low-power modes: Idle, Ultra-low-power and Backup. Depending on the mode
implemented on the SAMA5D3, the power consumption on VDDCORE can be lowered to different levels (refer to
the SAMA5D3 datasheet for detailed numbers).
When the processor goes into Ultra-low-power mode, power consumption and MCK frequency decrease. The
lower the CPU MCK frequency, the less power it consumes, and the longer the wake-up time becomes.
Suggestion: Select the appropriate MCK frequency for Ultra-low-power mode depending on the requirements of
application performance and wake-up speed.
Note: Put the core into Idle mode to save power when no tasks are in process.
Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]
Atmel-11291A-ATARM-Low-Power-Design-for-SAMA5D3-based-Systems-Application-Note_23-Jun-14
19
3.1.1.2 VDDIODDR
The current into VDDIODDR depends on the external memory devices and speed. Its range can vary from almost
0 to a much higher value.
For the LPDDR2 on the CMP board, the voltage of the memory IOs is 1.25V and MCK is set to 132 MHz.

After memory initialization, the current is about 4.5 mA with no data access. This current will increase with
more data access (read and write), achieving up to 10.9 mA.

For memory Self-refresh mode, the current is as low as 2~3 uA.
In comparison, for the DDR2 on the CM board, with voltage of memory IOs at 1.8V and the MCK set to 132 MHz,,
the current into VDDIODDR ranges from 15 mA to 20 mA.
3.1.1.3 VDDIOM, VDDIOP0 and VDDIOP1
These three power rails power most I/Os of SAMA5D3 (refer to section 4 “Package and Pinout” in datasheet). Any
peripheral activity may affect the current value on the corresponding power rail.
3.1.1.4 VDDBU
VDDBU powers the Slow Clock oscillator, the internal 32 kHz RC oscillator and a part of the System Controller.
Suggestion: To reduce power consumption on VDDBU, make sure that the unused oscillator is disabled when
switching between the external and internal oscillators..
Note: The internal 32 kHz RC oscillator is used in ROM code for fast boot-up, though its frequency precision is
lower than that of the external crystal oscillator.
3.1.1.5 VDDOSC, VDDUTMIC and VDDUTMII
VDDOSC powers the main oscillator cell and part of the PLL UTMI.
VDDUTMIC powers the USB device and host UTMI+ core.
Once the USB transceiver is enabled, approximately 5.5 mA will be consumed on this power rail. There will be an
increase of approximately 2.5 mA for device or host transfer.
VDDUTMII powers the USB device and host UTMI+ interface.
There is a total of three USB ports. Each port causes an increase of about 18 mA of current in VDDUTMII after the
USB connection is set up.
Suggestion: To reduce power consumption on these three power rails, disable the USB transceiver as well as the
UTMI PLL if the USB is not necessary in the application.
3.1.1.6 VDDPLLA
The PLL output frequency ranges from 400 MHz to 1000 MHz. The higher the output frequen cy, the higer the
power consumption. Thus it is important to define an appropriate clock tree for the system and then set up the
oscillator and PLLs accordingly.
For example, if PCK = 400 MHz, more power is saved by setting PCK = PLL = 400 MHz instead of PLL = 800 MHz
and PCK=PLL/2.
3.1.1.7 VDDANA
VDDANA supplies the Analog-to-Digital Converter and its IOs only. When the ADC is not in use or in Sleep mode,
the current through this power rail is only several µA.
3.1.1.8 VDDFUSE
During FUSE programming, the maximum current through VDDFUSE may reach 40 mA. Under other conditions,
such as FUSE reading or no action, power consumption is close to 0.
20
Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]
Atmel-11291A-ATARM-Low-Power-Design-for-SAMA5D3-based-Systems-Application-Note_23-Jun-14
3.1.2
System Clock
Master clock (MCK) is the clock provided to memory controllers and all peripherals. When the processor and all
peripherals are idle and no task is being processed, the base consumption on VDDCORE mainly depends on MCK
frequency, whether the PCK is equal to 2 × MCK, 3 × MCK, or 4 × MCK. The PCK frequency only affects the CPU
performance.
Table 3-2 shows the power consumption in Linux Idle mode with different MCK. We can see that the power
consumption on VDDCORE in Idle mode is proportional to MCK frequency (~ 0.32 mA/MHz).
Table 3-2.
VDDCORE Consumption Vs. MCK
OS Idle
MCK=132 MHz
PCK=528 MHz,
VDDCORE=1.25V
OS Idle
MCK=132 MHz
OS Idle
MCK=88 MHz
OS Idle
MCK=50 MHz
PCK=396 MHz
PCK=264 MHz
PCK=200 MHz
Power
Consumption
(mW)
Current
(mA)
Power
Consumption
(mW)
50.27 28.09
33.71
18.38
22.06
5.08 2.84
3.41 1.63
1.96
0.26 0.079
0.26 0.079
0.26
0.27 0.083
0.27 0.083
0.27 0.082
0.27
0.56 0.17
0.56 0.17
0.56 0.17
0.56
0.0013
0.00 0.0013
0.00 0.0013
0.00 0.001
3
0.00
1.2
0.0099
0.01 0.0093
0.01 0.0086
0.01 0.008
3
0.01
VDDUTMII(JP11)
3.3
0.0002
0.00 0.0002
0.00 0.0002
0.00 0.000
2
0.00
VDDPLLA(JP4)
1.2
7.81
9.76 9.99
11.99
10.01
12.01
VDDOSC(JP12)
3.3
0.42
1.39 0.42
1.39 0.42
1.39 0.42
VDDANA(JP13)
3.32
0.0032
0.01 0.0032
0.01 0.0032
0.01 0.003
2
0.01
VDDFUSE(JP10)
2.51
0.0002
0.00 0.0002
0.00 0.0002
0.00 0.000
2
0.00
Power
Consumption
(mW)
Voltage
Current
Power Rail
(V)
(mA)
VDDCORE(JP2)
1.2
42.18
52.73 41.89
VDDIODDR(JP15)
1.2
4.33
5.41 4.23
VDDIOM(JP6)
3.3
0.079
0.26
VDDIOP0(JP9)
3.3
0.083
VDDIOP1(JP8)
3.3
0.17
VDDBU(JP7)
3.25
VDDUTMIC(JP3)
Current
(mA)
0.08
70
Total
Power
Consumption
(mW)
Current
(mA)
7.82
70
9.38
1.39
49
39
VDDCORE
Consumption
0.32
0.40
0.32
0.38
0.32
0.38
0.37
0.44
Per MCK
Suggestion: Select the appropriate PCK depending on application requirements.
Then set MCK to 1/4 × PCK.
3.1.3
Peripherals
The peripherals can be divided into three categories depending on their behavior regarding power consumption
(VDDCORE). Refer to the table “Power Consumpti on by Peripheral in Active Mode (TA 25°C, TA 85°C and TA
105°C)” in the Electrical Characteristics section in the SAMA5D3 datasheet.
3.1.3.1 Category I
Each peripheral in this category consumes a constant amount of power as long as it is enabled, with the powe r
consumption value directly proportional to its working frequency.
For example, when the USART is enabled, its power consumption is:
3.0 µA/MHz(1) × working frequency(2)
Note (1): 3.0 uA/MHz is the USART consumption per MHz.
Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]
Atmel-11291A-ATARM-Low-Power-Design-for-SAMA5D3-based-Systems-Application-Note_23-Jun-14
21
Note (2): The working frequency is not always equal to MCK.
The Soft Modem (SMD) is a special case, with its power consumption dependent on its clock source instead of its
working frequency. Linear with the MCK, thus its power consumption is:
5.5 µA/MHz(3) × MCK
Note (3): 5.5 uA/MHz is the SMD consumption per MHz.
3.1.3.2 Category II
The power consumption of the peripherals in this category is related to their transfer speed.
For example, for the high-speed USB Host, when CPU usage is 24%, the UHPHS power consumption is:
(9.6 × transfer speed (Mb/s) + 12) µA/MHz × MCK
Note: For UHPHS/UDPHS, LCDC, EMAC/GMAC, the power consumption already includes the MPDDRC
consumption on VDDCORE.
3.1.3.3 Category III
The power consumption of each peripheral in this category is related to its bandwidth usage.
An example is the MPDDRC. Figure 3-1 shows the correlation between MPDDRC power consumption and its
bandwidth.
Figure 3-1.
Correlation between Consumption and Bandwidth
Half FIFO
80
y = 31.82x + 46.598
R² = 0.997
70
Series1
Linear (Series1)
Current uA/MHz
Current uA/MHz
Full FIFO
59
58
57
56
55
54
53
52
51
50
0.00
60
y = 40.899x + 46.773
R² = 0.9998
50
40
Series1
30
Linear (Series1)
20
10
0.10
0.20
0.30
0.40
0
0.00
Bandwidth Usage
0.20
0.40
0.60
Bandwidth Usage
The increase in power consumption is linear with MCK (with the same bandwidth usage condition). Figure 3-2
shows the relation between power consumption increase and MCK (with the same bandwidth).
22
Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]
Atmel-11291A-ATARM-Low-Power-Design-for-SAMA5D3-based-Systems-Application-Note_23-Jun-14
Figure 3-2.
Linearity between Consumption Increase and MCK
MPDDRC Increase (49% bandwidth))
vs. Master Clock
Current (mA)
4
3.5
3
2.5
2
Total
1.5
1
0.5
0
33
66
100
132
165
MCK (MHz)
3.1.4
VDDCORE Power Consumption Model
With the power consumption information extracted from the datasheet, we can estimate the overall consumption
on each power rail.
Note: Compared to VDDCORE, other power rails do not contribute much to overall power consumption. For this
reason, the focus in this section is on the power consumption model of VDDCORE.
The overall consumption on VDDCORE can be calculated by the formula:
IVDDCORE_overall = IVDDCORE_idle + (IVDDCORE_dhrystone – IVDDCORE_idle) × CPU_usage (%) + IVDDCORE_peripheral_1 + …
+ IVDDCORE_peripheral_n
With the GMAC use case as an example:

MCK is 132 MHz, PCK is 528 MHz.

USART and GMAC are both enabled.

CPU usage is 24%.

GMAC transfer speed is 300 Mb/s.
Therefore the theoretical overall consumption on VDDCORE is:
IVDDCORE_overall = 24 mA + (117 mA - 24 mA) × 24% + (1.2 uA × 300 Mb/s + 36 uA) × 132 MHz / 1000
+ 3.0 uA × 132 MHz / 1000 = 99.02 mA
Note:
Note:
IVDDCORE_idle: VDDCORE power consumption in Idle mode (24 mA, refer to the SAMA5D3 datasheet)
IVDDCORE_dhrystone: VDDCORE Power Consumption in Active Mode running Dhrystone (117 mA, refer to the SAMA5D3 datasheet).
The calculated theoretical result is aligned with the measured value: 95.24 mA.
Note: The calculated theoretical value is only for reference. The final da ta should be based on the real
measurement result.
Suggestions:
1. Disable any peripherals not implemented in the user application to avoid unnecessary power consumption.
Note: Disabling the USB is not sufficient to e nsure that it consumes no power. In addition, the USB transceivers
must also be disabled.
2. Use the minimum peripheral clock rate (MCK/8, /4, /2).
Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]
Atmel-11291A-ATARM-Low-Power-Design-for-SAMA5D3-based-Systems-Application-Note_23-Jun-14
23
3.1.5
Power Supply
Set the power supply voltage to a minimum value depending on the corresponding working conditions:

1.15V ± 5% for VDDCORE in Linux Suspend-to-mem mode

1.2V ± 5% (PLL < 800 MHz) or 1.25 V ± 5% (PLL >= 800 MHz) in Active mode
The power management IC (Active-Semi PMIC)makes it possible to adjust the core voltage dynamically. Normally,
core and PLL supply must be set to 1.25V to reach their maximum speed. If PCK ≤ 400 MHz, 1.15V is enough to
save power.
3.1.6
Multi-port DDR-SDRAM Controller (MPDDRC)
For the Multi-port DDR-SDRAM Controller (MPDDRC), external impedance match resistors are not necessary
because the MPDDRC already has internal impedance matched. Therefore, adding external resistors may lead to
higher consumption.
Suggestions:
1. Do not add external impedance match resistors for MPDDRC.
2. Set the memory refresh cycle properly. Generating too many refresh commands will lower the memory
bandwidth and SAMA5D3 performance.
3.1.7
GPIO
In Low-power modes, the I/O state of SAMA5D3 can influence the power consumption of the external devices.
For example, for some bidirectional I/Os with external pull-up/pull-down resistors, their states are uncertain when
the CPU enters Low-power modes. This may lead to extra power consumption.
Suggestion: Correctly configure the PIO to pull-up/pull-down, input/output, output (0/1) state.
Using the Soft Modem as an e xample, set its two pads (DIBP to Pull-up state, DIBN to Pull-down state) to
minimize power consumption.
24
Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]
Atmel-11291A-ATARM-Low-Power-Design-for-SAMA5D3-based-Systems-Application-Note_23-Jun-14
3.2
Optimizing Power Consumption of External Devices
To minimize overall system-level power consumption, the power consumption of external devices must be taken
into consideration.
3.2.1
General Guidelines
Check the specification of each external device for the correlation between power consumption and the different
working modes, then configure the device to work in the appropriate power mode.
If the low-power requirement is still not met, shut down the external device by directly switching off its power supply
when it is not used.
3.2.2
Examples on SAMA5D36-CMP Demo Board
3.2.2.1 LPDDR2
The SAMA5D3 supports DDR2 and LPDDR2, both of which can be set in Self-refresh mode when the Linux OS
enters Standby/Suspend mode. It is recommended to use LPDDR2 instead of DDR2 in low-power applications
because the power consumption level of LPDDR2 is only about 1/3 of that of DDR2 (refer to Table 3-3 for details),
with both running at the same frequency. In addition, LPDDR2 can work at a much lower frequency thus saving
more power, while there is a minimum frequency limitation for DDR2.
Table 3-3 provides the power consumption comparison between LPDDR2 (on CMP) and DDR2 (on CM).
Table 3-3.
Power Consumption Comparison between LPDDR2 and DDR2
Current (µA) from Datasheet
LPDDR2
MT42L128M32D1GU-25 WTA
DDR2 * 2
MT47H128M16RT-25E:C
400 MHz
Self-refresh Mode
122000
5683
324000
28800
Note: The LPDDR2 module on the CMP board is MT42L 128M32D1GU-25 WTA (512 MB, 32-bit); the DDR2
module on the CM board is MT47H128M16RT-25 (256 MB, 16-bit).
3.2.2.2 Gigabit Ethernet PHY
The GMAC PHY chip (KSZ9031RNX) on the SAMA5D3 demo board has two power-down modes: software powerdown and chip power-down. The consumption in chip power-down mode is lower than that in software powerdown mode. However, it is important to note that once the GMAC PHY enters into chip power-down mode, the only
way to exit is by hardware reset.
3.2.2.3 Device Shutdown
If the LCD is not used, ensure that the LCD backlight is turned off, as it has the highest power consumption of the
system. Put the LCD control IC into Standby mode. Ensure that the LCDC is disabled in the SAMA5D36.
By implementating the suggestions for consumption optimization, the power consumption of the corresponding
external devices can be reduced. Table 3-4 shows the change in power consumption figures after implementing
the power-saving techniques on the SAMA5D36-CMP board.
Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]
Atmel-11291A-ATARM-Low-Power-Design-for-SAMA5D3-based-Systems-Application-Note_23-Jun-14
25
Table 3-4.
4.
Power Consumption of External Devices
Consumption in
Active Mode
5V (mA)
Consumption in
Low-Power Mode
5V (mA)
Consumption Optimization Solution
Expected
Consumption
5V (mA)
LCD
260
50
Disconnect DM board
0
G-PHY
90
13
Set to power-down mode
13
E-PHY
32
2
Set to power-down mode
2
COM
20
0.6
Disconnect cable
0.6
HDMI
4.7
4.7
Set to power-down mode
0
JTAG
36
36
Disconnect its power supply
0
Audio
0.1
0.1
Keep in power-down mode (after reset)
0.1
Other ICs
15
15
15
Total
457.8
121.4
30.7
Conclusion
The SAMA5D3 series tar gets low-power applications. Its power consumption is significantly lowe r compared to
some competitors’ similar products in both low-power and in active modes, without reduced performance levels.
The SAMA5D3 is suitable for low-power applications, such as portable devices that require long battery life and a
rich set of connectivity interfaces.
The data provided in this application note may vary from board to board and from device to device, and de pends
on the measurement conditions and type of equipment used. The data is for reference only.
26
Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]
Atmel-11291A-ATARM-Low-Power-Design-for-SAMA5D3-based-Systems-Application-Note_23-Jun-14
5.
FAQ
1. When the demo board is powered on, why doesn’t the default demo show up?
Please check the following points:

Double check all the jumpers to make sure they are set correctly. If not, set them according to Figure 1-2.

The demo might not be successfully flashed, or the NAND Flash might be erased. If so, re-flash the default
demo as described in Section 1.2.

If an amp meter is inserted for current measurement, the supply voltage might drop due to the impedance of
the amp meter. Check the range selection of the meter.
2. Why does switching the test range of the amp meter cause the reset of the demo board?

On some low-end amp meters, the current loop is cut off during range switching.
3. Why are the consumption nu mbers I get in some cases not exactly the same as those pro vided in this
application note?

The numbers provided in this application note are typical/average values. The actual values might vary
slightly due to certain factors such as different ICs, PCB and temperature.

The default demo is with a full DTB, in which most peripherals and drivers have been enabled. If you use the
default demo for other different cases (where specific DTBs instead of the full DTB should be used), the
power consumption will increase.
4. How can I wake up the system from Standby/Suspend mode when no DM board is connected?

A push-button PB3 on the MB can be used to wake up the kit from Standby/Suspend mode. But as the pin
for push-button PB3 is multiplexed as one LCD data line, for the default/LCD/ISI case, the push-button PB3
does not work and you must reset the kit.
5. In the USB host scenario, why is the current through VDDUTMII and VDDOSC abnormal in Low-power mode?

In the current release, the USB transceiver and an internal bandgap for UTMI PHY cannot be stopped once
they have been started or initialized.
6. Why is the wake-up time printed on the hyperterminal in this demo longer than that in datasheet?

The wake-up time in the datasheet is the time from when the wake-up event occurs to when the core
executes the first instruction.

The wake-up time printed on the hyperterminal in this demo is from the wake-up event occurrence to system
recovery. The extra time is used to resume device drivers.
Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]
Atmel-11291A-ATARM-Low-Power-Design-for-SAMA5D3-based-Systems-Application-Note_23-Jun-14
27
Appendix A. SAMA5D36-CMP Schematics
This section contains the following schematics:
28

Block diagram

PIO Muxing & Jumper

SAMA5D3x power

SAMA5D3x NOR and NAND Flash

SAMA5D3x Data Flash, 1-wire, LED

4Gb LPDDR2

Ethernet

200-pin SODIMM
Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]
Atmel-11291A-ATARM-Low-Power-Design-for-SAMA5D3-based-Systems-Application-Note_23-Jun-14
5
D
4
S
O
D
I
M
M
C
O
N
N
E
C
T
O
R
C
PIO
PIO
PIO
CONNECTOR CONNECTOR CONNECTOR
B
3
2
1
5V INPUT
D
VBAT
128Mb
NOR
FLASH
ANALOG Reference
ATMEL
ARMA5 PROCESSOR
ATSAMA5D36-CU
USB A,B,C
DIB
4Gb
LPDDR2
SDRAM
EBI
ICE
2Gb
NAND
FLASH
PIO A,...E
C
PIO A,...E
PIO A&D
B
PIO B&E
1-WIRE
EEPROM
PIO C
TWO LED
SERIAL
DATA
FLASH
10/100/1000 FAST
ETHERNET
A
A
C
B
A
REV
SAMA5D36-CMP
JH
JH
JH
MODIF.
SCALE
DES.
21-Jan-14
27-Sep-13
18-Jun-13
DATE
1/1
BLOCK DIAGRAM
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
5
4
3
2
1
X.X
X.X
X.X
XX-XXX-XX
XX-XXX-XX
XX-XXX-XX
VER.
DATE
REV.
SHEET
C
2
10
5
4
3
2
1
D
D
SAMA5D36 config
JUMPER and SOLDERDROP
PAGE
C
REFERENCE
DEFAULT
4
JP2
CLOSE
VDDCORE
FUNCTION
4
JP3
CLOSE
VDDUTMIC
SAMA5D31
SCHEMATICS CONVENTIONS
SAMA5D33
SAMA5D34
SAMA5D35
(1) Resistance Unit: "K" is "Kohm", "R" is "Ohm
SAMA5D36
CAN0
CAN1
(2) "DNP" means the component is not populated
by default
GMAC
EMAC
4
JP4
CLOSE
VDDPLLA
4
JP6
CLOSE
VDDIOM_MPU
4
JP7
CLOSE
VDDBU
4
JP8
CLOSE
VDDIOP1_MPU
4
JP9
CLOSE
VDDIOP0_MPU
4
JP10
CLOSE
FUSE_2V5
4
JP11
CLOSE
VDDUTMII
4
JP12
CLOSE
VDDOSC
4
TP18
SHDN
4
JP13
CLOSE
VDDANA
4
R130
Option for NRSTO from PMIC
4
TP23
Output 6 ( LDO) of PMIC
4
JP14
OPEN
CM-3V3 to MB-3V3
4
C190
Option for SHDN pulse edge power on PMIC
4
TP24
Output 7 ( LDO) of PMIC
4
JP15
CLOSE
VDDIODDR_MPU_1V2
4
Q4
Option for nPBIN from MB button
5
TP25
PE0 ( EBI_A0 )
4
JP17
CLOSE
VCC_5V
4
C195
Option for delay NRST_CMP
8
TP6
DDR_VREF
4
JP18
CLOSE
VCC_1V8
4
R133
Option for nPBSTAT to PD19
4
JP19
CLOSE
VCC_3V3
4
JP14
Option for VCC_3V3 to MB
4
JP20
CLOSE
VDDIOP1_GPHY
5
R54
Option for pull up JTAGSEL
4
JP21
CLOSE
VDDIODDR_1V2
6
R1
Option for pull down WP of NAND flash
4
JP22
CLOSE
VCC_1V2
8
R82, R83
Option for terminal DDR_CLK
7
JP1
CLOSE
SPI0_NPCS0 for Dataflash
10
9
JP16
2-1
GPHY 1V2 from VCC_1V2
2-3
GPHY 1V2 from PMOS
HSMCI2
LCDC
USART0
USART1
TEST POINT
ISI
TC1
PAGE
DEFAULT NO POPULATE PARTS
PAGE
REFERENCE
FUNCTION
R81
REFERENCE
FUNCTION
4
TP4
NRST_CMP
4
TP10
WKUP
C
Option for PB13 to Sodimm
B
B
A
A
C
B
A
REV
SAMA5D36-CMP
JH
JH
JH
MODIF.
SCALE
DES.
21-Jan-14
27-Sep-13
18-Jun-13
DATE
1/1
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
4
3
2
1
XX-XXX-XX
XX-XXX-XX
XX-XXX-XX
VER.
DATE
REV.
SHEET
C
PIO Muxing & Jumper
5
X.X
X.X
X.X
3
10
5
4
3
2
1
Filter for VDDREF
R98
1R
C194
1uF
VCC_5V_SOD
MN16
C169
2.2uF
ACT8865
C170
2.2uF
NRST_CMP
TP4
SMD
WKUP
TP10
SMD
SHDN
TP18
SMD
JP17
C172
4.7uF
18
25
23
VDDREF
VDDBU_SOD
VCC_3V3
R102
10K
R101
10K
WKUP
PD19
R107
0R
R133
0R
DNP
R99
0R
20
R103
0R
17
13
R129
PC31
(TWCK1)
(TWD1)
PC27
PC26
12
330R
NRSTO
11
PWRHLD
10
R119
R120
21
22
0R
0R
32
9
C184
47nF
VP1
VP2
VP3
SHDN
PWRHLD
R100
1K
27
24
L17
15
19
L18
2
2.2uH
C174
10uF
SW2
OUT2
0R
100K
2
SW3
OUT3
C178
10uF
C179
10uF
C180
100nF
C181
10uF
C182
10uF
C183
100nF
2
2.2uH
nRSTO
Discharge current on LPDDR2-VDD1
VCC_1V2
JP19
nIRQ
VCC_3V3
1
PWRHLD
JP13
SCL
SDA
OUT4
OUT5
REFBP
OUT6
nPBIN
OUT7
D
1
nPBSTAT
3
(3V3)
R105
0R
4
(2V5)
R106
0R
7
(1V8)
2
VDDANA
1
FUSE_2V5
JP10
8
TP23
SMD
TP24
SMD
2
1
VDDIOP1
JP20
VDDIOP1_GPHY
2
1
C
C185
4.7uF
C186
4.7uF
C187
4.7uF
C188
4.7uF
VCC_3V3
VDDIOM
R124
VDDIOM_NOR
0R
R125
VDDIOM_NAND
0R
From PMIC
VCC_3V3
NRSTO
R131
100nF
C190
DNP
R114
100K
R123
C175
10uF
R109
51K
1
C197
10nF
1
2.2uH
PWREN
GA
C189
100nF
Enable or Disable DCDC
VDDREF
L16
Q2
BSN20
0R
R132
51K
30
1
JP22
VSEL
3
R110
VCC_1V8
JP18
VDDREF
2
R108
WKUP_SOD
SW1
OUT1
NC1
NC2
C
Wake up and Force power on button
on MB; the pull-up resistor on MB
should DNP
INL45
INL67
EP
C173
4.7uF
5
6
33
C171
4.7uF
31
26
16
GP1
GP2
GP3
D
1
29
28
14
2
6
5
2
VDDIOM
NRST_CMP
0R
NRST_SOD
C198
10nF
1
R113
1.5K
0R
C195
100nF
DNP
Q4
Si1563EDH
DNP
Auto power on option
DNP
4
2
C196
100nF
R130
From MB push button, connect
some device's reset input on MB
3
R134
100K
VCC_1V2
JP2
B
VCC_3V3
L1
180ohm at 100MHz
2
1
2
VDDIOM
JP6
2
VDDBU_SOD
R115
VDDIOP1
L11
180ohm at 100MHz
2
1
VDDIOP0
B
1
L19
10uH/150mA
L12
180ohm at 100MHz
2
1
VDDCORE
1
VDDIOM_MPU
JP8
2
VDDIOP1_MPU
1
JP3
2
0R
C191
100nF
2
VDDUTMIC
2
R111
1R
C192
4.7uF
VDDIOP0_MPU
L2
10uH/150mA
JP11
2
L10
10uH/150mA
C90
100nF
VDDUTMII
1
JP12
2
0R
JP14
DNP
2
VCC_3V3_SOD
1
1
R116
R117
1
1
VCC_3V3
JP9
VDDBU
JP7
JP4
2
0R
C3
100nF
VDDPLLA
Use when need feeding MB 3V3
1
R17
1R
C2
4.7uF
VDDOSC
1
R21
1R
L20
120@100MHz,2A
1
2
A
VDDIODDR_MPU_1V2
JP15
2
A
1
C100
4.7uF
VDDIODDR_1V2
JP21
2
C
B
A
1
REV
SAMA5D36-CMP
JH
JH
JH
MODIF.
SCALE
DES.
21-Jan-14
27-Sep-13
18-Jun-13
DATE
1/1
POWER
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
5
4
3
2
1
X.X
X.X
X.X
XX-XXX-XX
XX-XXX-XX
XX-XXX-XX
VER.
DATE
REV.
SHEET
C
4
10
5
4
3
2
1
VDDIOP1_MPU
C97
100nF
C73
100nF
D
D
VDDBU
VDDCORE
VDDIOP0_MPU
VDDIOP0
8 100K
7 100K
6 100K
5 100K
C63
100nF
C
BMS
VDDIOP0
VDDBU_SOD
C46
100nF
C75
100nF
C48
100nF
C79
100nF
C52
100nF
C80
100nF
C82
100nF
C81
100nF
C101
4.7uF
U15
U9
R15
10K
R55
R53
100K
100K
T10
T12
WKUP
SHDN
C5
C7
D14
T7
T15
U17
V7
VDDIOM_MPU
VDDCORE_1
VDDCORE_2
VDDCORE_3
VDDCORE_4
VDDCORE_5
VDDCORE_6
VDDCORE_7
JTAGSEL
TDI
TMS
TCK
TDO
NTRST
NRST
VDDIOP0_1
VDDIOP0_2
VDDIOP1_1
VDDIOP1_2
VDDBU
T9
R8
N10
P9
M11
P11
V9
L11
M4
V15
R54
100K
DNP
G7
V11
VDDBU_SOD
RR4A 1
RR4B 2
RR4C 3
RR4D 4
JTAGSEL
TDI
TMS
TCK
TDO
NTRST
NRST_CMP
C72
100nF
VDDIOM_1
VDDIOM_2
P12
T16
C51
100nF
C61
100nF
VDDIODDR_MPU_1V2
C
VDDIODDR_1
VDDIODDR_2
VDDIODDR_3
VDDIODDR_4
VDDIODDR_5
TST
BMS
D13
F14
G10
G13
H11
C74
100nF
C60
100nF
C71
100nF
1
2
20pF
U8
VDDFUSE
20pF
V8
4
C6
3
20pF
C8
20pF
1
VDDUTMII
U6
V6
DIBN
DIBP
U13
R10
C5
100nF
XOUT32
VDDUTMIC
DIBN
DIBP
VDDUTMIC
V13
C66
100nF
B
SUP1
B
VDDANA
L6
GNDANA
GNDUTMI_1
ADVREF
ADVREF
L5
C85
100nF
L4
GNDIOM_1
GNDIOM_2
R12
J11
T17
GNDIOP_1
GNDIOP_2
GNDIOP_3
GNDIOP_4
C106
100nF
J7
N11
U7
E5
GNDIODDR_1
GNDIODDR_2
GNDIODDR_3
GNDIODDR_4
GNDIODDR_5
E14
F10
F13
F15
H14
GNDCORE_1
GNDCORE_2
GNDCORE_3
GNDCORE_4
GNDCORE_5
GNDCORE_6
GNDOSC
GNDFUSE
GNDPLL
VBG
A16
C9
N13
T8
T14
V17
R52
C62
5.62K 1% 10pF
HHSDMC
HHSDPC
T11
P4
R11
VDDANA
GNDBU
V14
U14
HHSDMC
HHSDPC
GNDUTMI
HHSDMB
HHSDPB
T13
V12
U12
HHSDMB
HHSDPB
HHSDMA
HHSDPA
P10
V10
U10
HHSDMA
HHSDPA
C17
100nF
VDDPLLA
XIN32
VDDPLLA
V16
C128
100nF
U11
XOUT
32.768 kHz
2
Y1
VDDUTMII
C86
100nF
VDDOSC
MN4H
ATSAMA5D36-CU
U16
VDDOSC
R3
XIN
Y2
12MHz
C10
C4
100nF
WKUP
SHDN
FUSE_2V5
C11
C54
100nF
GNDUTMI
R51
0R
DNP
CA89405MF
GNDUTMI
A
A
C
B
A
REV
SAMA5D36-CMP
JH
JH
JH
MODIF.
SCALE
DES.
21-Jan-14
27-Sep-13
18-Jun-13
DATE
1/1
SAMA5D36-I&POWER
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
5
4
3
2
1
X.X
X.X
X.X
XX-XXX-XX
XX-XXX-XX
XX-XXX-XX
VER.
DATE
REV.
SHEET
C
5
10
5
4
MN4E
ATSAMA5D36-CU
MN4F
ATSAMA5D36-CU
D
C
DDR_A[0..13]
DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_A13
DDR_D0
DDR_D1
DDR_D2
DDR_D3
DDR_D4
DDR_D5
DDR_D6
DDR_D7
DDR_D8
DDR_D9
DDR_D10
DDR_D11
DDR_D12
DDR_D13
DDR_D14
DDR_D15
DDR_D16
DDR_D17
DDR_D18
DDR_D19
DDR_D20
DDR_D21
DDR_D22
DDR_D23
DDR_D24
DDR_D25
DDR_D26
DDR_D27
DDR_D28
DDR_D29
DDR_D30
DDR_D31
DDR_BA0
DDR_BA1
DDR_BA2
DDR_RAS
DDR_CAS
DDR_CKE
DDR_CLK
DDR_CLKN
B
3
DDR_CS
DDR_WE
DDR_DQM0
DDR_DQM1
DDR_DQM2
DDR_DQM3
DDR_DQS0
DDR_DQSN0
DDR_DQS1
DDR_DQSN1
DDR_DQS2
DDR_DQSN2
DDR_DQS3
DDR_DQSN3
B10
C11
A9
D11
B9
E10
D10
A8
C10
B8
F11
A7
D9
A6
DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_A13
H12
H17
H13
G17
G16
H15
F17
G15
F16
E17
G14
E16
D17
C18
D16
C17
B16
B18
C15
A18
C16
C14
D15
B14
A15
A14
E12
A11
B11
F12
A10
E11
DDR_D0
DDR_D1
DDR_D2
DDR_D3
DDR_D4
DDR_D5
DDR_D6
DDR_D7
DDR_D8
DDR_D9
DDR_D10
DDR_D11
DDR_D12
DDR_D13
DDR_D14
DDR_D15
DDR_D16
DDR_D17
DDR_D18
DDR_D19
DDR_D20
DDR_D21
DDR_D22
DDR_D23
DDR_D24
DDR_D25
DDR_D26
DDR_D27
DDR_D28
DDR_D29
DDR_D30
DDR_D31
DDR_CALN
DDR_CALP
M_EBI_A21
M_EBI_A22
M_EBI_A23
E9
B6
F9
R12
R9
R8
27R
27R
27R
R40
0R
R7
R10
R11
R41
0R
0R
0R
0R
FLASH_A1
FLASH_A2
FLASH_A3
FLASH_A4
FLASH_A5
FLASH_A6
FLASH_A7
FLASH_A8
FLASH_A9
FLASH_A10
FLASH_A11
FLASH_A12
FLASH_A13
FLASH_A14
FLASH_A15
FLASH_A16
FLASH_A17
FLASH_A18
FLASH_A19
FLASH_A20
FLASH_A21
FLASH_A22
FLASH_A23
PE24
PE25
PE26
PE27
PE28
PE29
PE30
PE31
PE[23..31]
PE23
NANDCLE
NANDALE
NCS0
VDDIOM_NOR
R38
10K
DDR_DQM0
DDR_DQM1
DDR_DQM2
DDR_DQM3
E18
D18
G18
F18
B17
A17
B13
A13
DDR_DQS0
DDR_DQSN0
DDR_DQS1
DDR_DQSN1
DDR_DQS2
DDR_DQSN2
DDR_DQS3
DDR_DQSN3
100nF
C13
DDR_VREF
R43
240R 1%
45
R36
100K
44
R59
100K
15
30
32
14
VDDIODDR_1V2
E13
1
NCS3
2
3
OE
VCC
IN
OUT
CLK
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
WAIT
ADV#
RFU1
RFU2
NC
34
36
39
41
47
49
51
53
35
37
40
42
48
50
52
54
M_EBI_D0
M_EBI_D1
M_EBI_D2
M_EBI_D3
M_EBI_D4
M_EBI_D5
M_EBI_D6
M_EBI_D7
M_EBI_D8
M_EBI_D9
M_EBI_D10
M_EBI_D11
M_EBI_D12
M_EBI_D13
M_EBI_D14
M_EBI_D15
56
46
26
27
13
C
VDDIOM_NOR
RST#
WP#
VCC
VCCQ
CE#
OE#
WE#
VSS
VSS
VSS
33
38
C1
100nF
12
28
31
C12
100nF
VPP
NCS0
R37
470K
5
C32
100nF
4
GND
MN3
MT29F2G08ABAEAWP
VDDIOM_NAND
MN4G
ATSAMA5D36-CU
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D16
NCS3
R18
240R 1%
43
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
VDDIOM_NAND
DDR_CS
DDR_WE
G12
E15
B15
D12
0R
VDDIOM_NOR
OE_Nandflash
29
25
24
23
22
21
20
19
8
7
6
5
4
3
2
1
55
18
17
16
11
10
9
R35
NRD
NWE
DDR_CKE
DDR_CLK
DDR_CLKN
C8
B5
C12
FLASH_A1
FLASH_A2
FLASH_A3
FLASH_A4
FLASH_A5
FLASH_A6
FLASH_A7
FLASH_A8
FLASH_A9
FLASH_A10
FLASH_A11
FLASH_A12
FLASH_A13
FLASH_A14
FLASH_A15
FLASH_A16
FLASH_A17
FLASH_A18
FLASH_A19
FLASH_A20
FLASH_A21
FLASH_A22
FLASH_A23
VDDIOM_NAND
DDR_RAS
DDR_CAS
B7
B12
A12
D
MN10
JS28F128P33TF70A
NRST_CMP
DDR_BA0
DDR_BA1
DDR_BA2
G11
A5
1
TP25
SMD
M_EBI_A0
P13
R14
R13
V18
P14
U18
T18
R15
P17
P15
P18
R16
N16
R17
N17
R18
N18
P16
M18
N15
M15
N14
M17
M13
M16
N12
M14
M12
L13
L15
L14
L16
MN1
NL17SZ126
C9
DDR_VREF
DDR_D[0..31]
PE0_A0/NBS0
PE1_A1
PE2_A2
PE3_A3
PE4_A4
PE5_A5
PE6_A6
PE7_A7
PE8_A8
PE9_A9
PE10_A10
PE11_A11
PE12_A12
PE13_A13
PE14_A14
PE15_A15_SCK3
PE16_A16_CTS3
PE17_A17_RTS3
PE18_A18_RXD3
PE19_A19_TXD3
PE20_A20_SCK2
PE21_A21/NANDALE
PE22_A22/NANDCLE
PE23_A23_CTS2
PE24_A24_RTS2
PE25_A25_RXD2
PE26_NCS0_TXD2
PE27_NCS1_TIOA2
PE28_NCS2_TIOB2
PE29_NWR1/NBS1_TCLK2
PE30_NWAIT
PE31_IRQ_PWML1
2
NRD
NWE_NWR0
NANDRDY
K12
K15
K14
K16
K13
K17
J12
K18
J14
J16
J13
J17
J15
J18
H16
H18
M_EBI_D0
M_EBI_D1
M_EBI_D2
M_EBI_D3
M_EBI_D4
M_EBI_D5
M_EBI_D6
M_EBI_D7
M_EBI_D8
M_EBI_D9
M_EBI_D10
M_EBI_D11
M_EBI_D12
M_EBI_D13
M_EBI_D14
M_EBI_D15
L12
NCS3
L17
K11
NRD
NWE
L18
VDDIOM_NAND
NRD R4
NWE R3
NANDCE
R39
NANDRDY R6
R5
R2
NANDCLE
NANDALE
0R
0R
100K
0R
10K
100K
R1
10K
DNP
16
17
8
18
9
7
19
1
2
3
4
5
6
10
11
14
15
20
23
24
35
21
22
38
CLE
ALE
RE
WE
CE
R/B
WP
N.C1
N.C2
N.C3
N.C4
N.C5
N.C6
N.C7
N.C8
N.C9
N.C10
N.C11
N.C12
N.C13
N.C14
DNU1
DNU2
DNU3
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
I/O8_N.C
I/O9_N.C
I/O10_N.C
I/O11_N.C
I/O12_N.C
I/O13_N.C
I/O14_N.C
I/O15_N.C
29
30
31
32
41
42
43
44
26
27
28
33
40
45
46
47
M_EBI_D0
M_EBI_D1
M_EBI_D2
M_EBI_D3
M_EBI_D4
M_EBI_D5
M_EBI_D6
M_EBI_D7
B
VDDIOM_NAND
VCC
VCC
VCC_N.C
VCC_N.C
VSS
VSS
VSS_N.C
VSS_N.C
12
37
34
39
C34
100nF
C33
100nF
13
36
25
48
NANDRDY
A
A
C
B
A
REV
SAMA5D36-CMP
JH
JH
JH
MODIF.
SCALE
DES.
21-Jan-14
27-Sep-13
18-Jun-13
DATE
1/1
SAMA5D36-II&NOR&NAND
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
5
4
3
2
1
X.X
X.X
X.X
XX-XXX-XX
XX-XXX-XX
XX-XXX-XX
VER.
DATE
REV.
SHEET
C
6
10
5
4
3
2
1
VDDIOP1
C
D
VDDIOP1
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PC8
PC9
PC10
PC11
PC12
PC13
PC14
PC15
PC16
PC17
PC18
PC19
PC20
PC21
PC22
PC23
PC24
PC25
PC26
PC27
PC28
PC29
PC30
PC31
R71
470K
PD11
PD10
PD12
(SPI0_MOSI) R79
(SPI0_MIS0) R76
(SPI0_SPCK) R77
5
2
6
0R
0R
0R
R126
0R
MN13
AT25DF321A
1
SI
SO
SCK
8
VCC
CS
4
GND
1
C114
100nF
3
7
WP
HOLD
JP1
2
PC0_ETX0
PC1_ETX1
PC2_ERX0
PC3_ERX1
PC4_ETXEN
PC5_ECRSDV
PC6_ERXER
PC7_EREFCK
PC8_EMDC
PC9_EMDIO
PC10
PC11
PC12
PC13
PC14
PC15
PC16
PC17
PC18
PC19
PC20
PC21
PC22
PC23
PC24
PC25
PC26
PC27
PC28
PC29
PC30
PC31
D8
A4
E8
A3
A2
F8
B3
G8
B4
F7
A1
D7
C6
E7
B2
F6
B1
E6
C3
D6
C4
D5
C2
G9
C1
H10
H9
D4
H8
G5
D3
E4
VDDIOP1
(SPI0_NPCS0)
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
PA10
PA11
PA12
PA13
PA14
PA15
PA16
PA17
PA18
PA19
PA20
PA21
PA22
PA23
PA24
PA25
PA26
PA27
PA28
PA29
PA30
PA31
R78
10K
MN12
NL17SZ126
OE_Dataflash
OE_Nandflash
1
2
PA0_LCDDAT0
PA1_LCDDAT1
PA2_LCDDAT2
PA3_LCDDAT3
PA4_LCDDAT4
PA5_LCDDAT5
PA6_LCDDAT6
PA7_LCDDAT7
PA8_LCDDAT8
PA9_LCDDAT9
PA10_LCDDAT10
PA11_LCDDAT11
PA12_LCDDAT12
PA13_LCDDAT13
PA14_LCDDAT14
PA15_LCDDAT15
PA16_LCDDAT16
PA17_LCDDAT17
PA18_LCDDAT18
PA19_LCDDAT19
PA20_LCDDAT20
PA21_LCDDAT21
PA22_LCDDAT22
PA23_LCDDAT23
PA24_LCDPWM
PA25_LCDDISP
PA26_LCDVSYNC
PA27_LCDHSYNC
PA28_LCDPCK
PA29_LCDDEN
PA30_TWD0
PA31_TWCK0
E3
F5
D2
F4
D1
J10
G4
J9
F3
J8
E2
K8
F2
G6
E1
H5
H3
H6
H4
H7
H2
J6
G2
J5
F1
J4
G3
J3
G1
K4
H1
K3
PC[0..31]
MN4C
ATSAMA5D36-CU
1
PA[0..31]
MN4A
ATSAMA5D36-CU
PD13
D3
BAT54C
2
3
OE
VCC
SERIAL DATAFLASH
VDDIOP1
5
C
IN
OUT
4
C123
100nF
GND
3
D
BOOT_CS_OFF
VDDIOM
B
PD[0..31]
MN4D
ATSAMA5D36-CU
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PB8
PB9
PB10
PB11
PB12
PB13
PB14
PB15
PB16
PB17
PB18
PB19
PB20
PB21
PB22
PB23
PB24
PB25
PB26
PB27
PB28
PB29
PB30
PB31
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
PD8
PD9
PD10
PD11
PD12
PD13
PD14
PD15
PD16
PD17
PD18
PD19
PD20
PD21
PD22
PD23
PD24
PD25
PD26
PD27
PD28
PD29
PD30
PD31
K5
P1
K6
R1
L7
P2
L8
R2
K7
U2
K9
M5
K10
N4
L9
N3
L10
N5
M6
T1
N2
M3
M2
L3
M1
N1
L1
L2
K1
K2
J1
J2
R70
1.5K
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
PD8
PD9
PD10
PD11
PD12
PD13
PD14
PD15
PD16
PD17
PD18
PD19
PD20
PD21
PD22
PD23
PD24
PD25
PD26
PD27
PD28
PD29
PD30
PD31
PE25
R72
MN14
DS2431P+
2
0R
IO
GND
PB0_GTX0
PB1_GTX1
PB2_GTX2
PB3_GTX3
PB4_GRX0
PB5_GRX1
PB6_GRX2
PB7_GRX3
PB8_GTXCK
PB9_GTXEN
PB10_GTXER
PB11_GRXCK
PB12_GRXDV
PB13_GRXER
PB14_GCRS
PB15_GCOL
PB16_GMDC
PB17_GMDIO
PB18_G125CK
PB19_GTX4
PB20_GTX5
PB21_GTX6
PB22_GTX7
PB23_GRX4
PB24_GRX5
PB25_GRX6
PB26_GRX7
PB27
PB28
PB29
PB30
PB31
T2
N7
T3
N6
P5
T4
R4
U1
R5
P3
R6
V3
P6
V1
R7
U3
P7
V2
V5
T6
N8
U4
M7
U5
M8
T5
N9
V4
M9
P8
M10
R9
NC1
NC2
NC3
NC4
3
4
5
6
1
PB[0..31]
MN4B
ATSAMA5D36-CU
B
1-WIRE EEPROM
VCC_3V3
PE[23..31]
R42
470R
PE25
D1
Blue
D2
red
R48
100K
PE24
1
2
3
R44
470R
Q1
IRLML2502
LED
A
A
C
B
A
REV
SAMA5D36-CMP
JH
JH
JH
MODIF.
SCALE
DES.
21-Jan-14
27-Sep-13
18-Jun-13
DATE
1/1
SAMA5D36-III&DATA&1-WIRE,LED
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
5
4
3
2
1
X.X
X.X
X.X
XX-XXX-XX
XX-XXX-XX
XX-XXX-XX
VER.
DATE
REV.
SHEET
C
7
10
5
4
3
2
1
LPDDR2 SDRAM
DDR_D[0..31]
D
D
U1A
DDR_RAS
DDR_CAS
DDR_WE
DNP
R82
C129
51R
DDR_CLK
51R
DDR_CLKN
100nF
P3
N3
M3
M2
M1
G2
F2
F3
E3
E2
DDR_CKE
K1
K2
DDR_CLK
DDR_CLKN
J3
H3
DDR_CS
L1
L2
DDR_DQS0
DDR_DQSN0
L6
L5
DDR_DQS1
DDR_DQSN1
G6
G5
CA0
CA1
CA2
CA3
CA4
CA5
CA6
CA7
CA8
CA9
DDR_A[0..13]
DNP
R83
DDR_RAS
DDR_CAS
DDR_WE
DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_CKE
DDR_CLK
DDR_CLKN
DDR_CS
DDR_DQS0
DDR_DQSN0
C
DDR_DQS1
DDR_DQSN1
1V8_VDD1
VCC_1V8
R112
DDR_DQS2
DDR_DQSN2
0R
DDR_DQS3
DDR_DQSN3
VDDIODDR_1V2
DDR_DQM0
DDR_DQM1
DDR_DQM2
DDR_DQM3
1V2_VDD2
DDR_DQS2
DDR_DQSN2
P8
P9
DDR_DQS3
DDR_DQSN3
D8
D9
DDR_DQM0
DDR_DQM1
DDR_DQM2
DDR_DQM3
K5
H5
N7
E7
CKE0
CKE1
CK
CK#
CS0#
CS1#
DQS0
DQS0#
DQS1
DQS1#
DQS2
DQS2#
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
N8
M8
M7
M9
M6
L7
L8
L9
G9
G8
G7
F6
F9
F7
F8
E8
T7
P6
T8
N5
P7
T9
R8
N6
E6
C8
B9
D7
E5
B8
D6
B7
DDR_D0
DDR_D1
DDR_D2
DDR_D3
DDR_D4
DDR_D5
DDR_D6
DDR_D7
DDR_D8
DDR_D9
DDR_D10
DDR_D11
DDR_D12
DDR_D13
DDR_D14
DDR_D15
DDR_D16
DDR_D17
DDR_D18
DDR_D19
DDR_D20
DDR_D21
DDR_D22
DDR_D23
DDR_D24
DDR_D25
DDR_D26
DDR_D27
DDR_D28
DDR_D29
DDR_D30
DDR_D31
C
DQS3
DQS3#
DM0
DM1
DM2
DM3
ZQ0
ZQ1
RFU1
RFU2
D3
C3
R86
240R 1%
K3
L3
MT42L128M32D1GU-25 WT
R87
0R
R88
0R
R89
0R
1V2_VDDCA
1V2_VDDQ
1V8_VDD1
U1B
1V2_VDD2
B
1V2_VDDCA
R121
0R
L14
10uH/150mA
VREFCA
R90
1R
C143
100nF
R91
1.5K 1%
R92
C147
4.7uF
C148
100nF
0R
DDR_VREF
C149
100nF
R93
1.5K 1%
1V2_VDDQ
R122
0R
L15
10uH/150mA
VREFDQ
R94
1R
C161
100nF
R95
1.5K 1%
R96
C165
4.7uF
C166
100nF
R97
1.5K 1%
1V2_VDDCA
TP6
SMD
0R
1V2_VDDQ
100nF
100nF
100nF
100nF
C133
C137
C134
C138
100nF
100nF
100nF
100nF
100nF
100nF
C139
C135
C140
C136
C141
C142
B6
C1
R1
T6
B5
D2
G1
J7
P2
T5
F1
H1
N2
100nF C144
100nF C145
100nF C146
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
C7
C10
D5
E9
F10
H6
J6
K6
M10
N9
P5
R7
R10
C151
C152
C153
C154
C155
C156
C157
C158
C159
C160
C162
C163
C164
C167
100nF
VREFCA
VREFDQ
A
G3
J9
B2
B3
J2
R3
T2
T3
VDD1
VDD1
VDD1
VDD1
VDD2
VDD2
VDD2
VDD2
VDD2
VDD2
VDDCA
VDDCA
VDDCA
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VREFCA
VREFDQ
NC1
NC2
NC3
NC4
NC5
NC6
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSCA
VSSCA
VSSCA
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
DNU1
DNU2
DNU3
DNU4
DNU5
DNU6
DNU7
DNU8
DNU9
DNU10
DNU11
DNU12
C2
C5
D1
H2
P1
R2
R5
J8
B
E1
J1
N1
C6
C9
D10
E10
F5
G10
J5
L10
M5
N10
P10
R6
R9
A1
A2
A9
A10
B1
B10
T1
T10
U1
U2
U9
U10
A
C
B
A
MT42L128M32D1GU-25 WT
REV
SAMA5D36-CMP
JH
JH
JH
MODIF.
SCALE
DES.
21-Jan-14
27-Sep-13
18-Jun-13
DATE
1/1
4Gb LPDDR2
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
5
4
3
2
1
X.X XX-XXX-XX
X.X XX-XXX-XX
X.X XX-XXX-XX
VER.
DATE
REV.
SHEET
C
8
10
5
4
3
2
1
AVDDL_PLL
R26
D
+ C125
10uF
AVDDH
+ C121
10uF
C115
10nF
C122
10nF
C118
10nF
R75
12.1K 1%
4.7K
1K
R24
R23
R22
27R
27R
27R
PB[0..31]
G125CK
PB18
INT_GETHR PB25
PB17
GMDIO
C105
10nF
C111
10nF
C99
10nF
+ C96
10uF
MN6
48
47
46
45
44
43
42
41
40
39
38
37
49
1
2
3
4
5
6
7
8
9
10
11
12
ETH0_RX1+
ETH0_RX1ETH0_TX2+
ETH0_TX2-
KSZ9031RNI
48-pin QFN
VDDIOP1_GPHY
R64 R63 R58 R61
4.7K 4.7K 4.7K 4.7K
MDC
RX_CLK
DVDDH
RX_DV
RXD0
RXD1
DVDDL
VSS
RXD2
RXD3
DVDDL
TX_EN
36
35
34
33
32
31
30
29
28
27
26
25
R19
R20
27R
27R
GMDC
GRXCK
PB16
PB11
C
RR1C
RR1D
R65
3
4
27R
6 27R
5 27R
GRX_CTL
GRX0
GRX1
PB13
PB4
PB5
RR2A
RR2B
1
2
8 27R
7 27R
GRX2
GRX3
PB6
PB7
GTX_CTL
PB9
27R
GTXCK
PB8
27R
27R
27R
27R
GTX3
GTX2
GTX1
GTX0
PB3
PB2
PB1
PB0
R60
27R
13
14
15
16
17
18
19
20
21
22
23
24
NC1
DVDDL
LED2
DVDDH
LED1
DVDDL
TXD0
TXD1
TXD2
TXD3
DVDDL
GTX_CLK
ETH0_RX2+
ETH0_RX2-
AVDDH
TXRXP_A
TXRXM_A
AVDDL
TXRXP_B
TXRXM_B
TXRXP_C
TXRXM_C
AVDDL
TXRXP_D
TXRXM_D
AVDDH
KSZ9031RNX
ISET
NC2
XI
XO
AVDDL_PLL
LDO_O
RESET_N
CLK125_NDO
DVDDH
DVDDL
INT_N
MDIO
C119
10nF
P_GND
C120
10nF
ETH0_TX1+
ETH0_TX1-
C
R69
R68
VDDIOP1_GPHY
AVDDL
+ C124
10uF
D
NRST_CMP
VDDIOP1_GPHY
LDO_O
L13
180ohm at 100MHz
1
2
27R
C112
10nF
XI
XO
VDDIOP1_GPHY
C109
10nF
DVDDL
VDDIOP1_GPHY
+ C126
10uF
C103
10nF
C116
10nF
C102
10nF
C108
10nF
C98
10nF
C104
10nF
R62
R34
4.7K
RR2C
RR2D
RR3A
RR3B
B
LED2
LED1
3
4
1
2
6
5
8
7
B
AVDDL_PMOS
3
3
VCC_1V2
S
AVDDL_PMOS
L8
180ohm at 100MHz
1
2
1
C21
AVDDL_PLL
20pF
XI
1
4
2
2
D_T
D
Y3
25MHz
JP16
3
C193
22uF
1
G
+ C20
47uF
C22
22uF
LDO_O
from PMIC
PCB heat sink
1x1 inch
copper ground
A
L9
180ohm at 100MHz
1
2
AVDDL
L7
180ohm at 100MHz
1
2
DVDDL
C18
4
AVDDH
2
Q3
FDT434P
20pF
XO
A
C
B
A
REV
SAMA5D36-CMP
JH
JH
JH
MODIF.
SCALE
DES.
21-Jan-14
27-Sep-13
18-Jun-13
DATE
1/1
ETHERNET
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
5
4
3
2
1
X.X
X.X
X.X
XX-XXX-XX
XX-XXX-XX
XX-XXX-XX
VER.
DATE
REV.
SHEET
C
9
10
5
4
3
2
VCC_5V_SOD
1
VCC_5V_SOD
J1
PE23
PE24
PE25
PE26
PA[0..31]
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
PA10
PA11
PA12
PA13
PA14
PA15
PA16
PA17
PA18
PA19
PA20
PA21
PA22
PA23
PA24
PA25
PA26
PA27
PA28
PA29
PA30
PA31
D
VDDIOM
PC25
PC23
PC21
PC18
PC16
PC8
PC6
PC4
PC2
PC0
PWR_EN
VCC_3V3_SOD
PE27
PC10
PC12
PC14
PC27
PC29
PC31
VDDIOP0
R127
0R
VDDIOP0_SOD
PA0
PA2
PA5
PA7
PA9
PA11
PA12
PA14
PA16
PA18
PB[0..31]
PB10
PB13
PB14
PB15
PB19
PB20
PB21
PB22
PB23
PB24
PB25
PB26
PB27
PB28
PB29
PB30
PB31
PA21
PA23
PA25
PA27
PA28
PA30
VDDANA
A
PD30
PD28
PD26
PD24
PD22
PD20
PD18
PD16
PD14
PC[0..31]
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PC8
PC9
PC10
PC11
PC12
PC13
PC14
PC15
PC16
PC17
PC18
PC19
PC20
PC21
PC22
PC23
PC24
PC25
PC26
PC27
PC28
PC29
PC30
PC31
VCC_5V_1
VCC_5V_3
GND1
PE23
PE24
PE25
PE26
VDDIOM_1
PC25
PC23
PC21
GND3
PC18
PC16
PC8
PC6
PC4
PC2
PC0
Enable_0
VCC_5V_2
VCC_5V_4
VBAT
PE29
PE30
PE31
GND2
VDDIOM_2
PC24
PC22
PC20
PC19
PC17
PC9
PC7
GND4
PC5
PC3
PC1
Enable_1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
VDDBU_SOD
PE29
PE30
PE31
PD12
PD10
PD8
PD6
PD5
PD3
PD1
VDDIOP1
R128
0R
VDDIOP1_SOD
PB10
PB14
PB19
PB21
PB23
PB24
HHSDPA
HHSDMA
HHSDPB
HHSDMB
HHSDPC
HHSDMC
ETH0_TX1+
ETH0_TX1ETH0_RX1+
ETH0_RX1ETH0_TX2+
ETH0_TX2ETH0_RX2+
ETH0_RX2LED2
LED1
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
C31
1uF
VDDIOM
PC24
PC22
PC20
PC19
PC17
PC9
PC7
C29
4.7uF
D
PC5
PC3
PC1
BOOT_CS_OFF
KEY
C
B
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
VCC_3V3_SOD
VCC_3V3_1
VCC_3V3_3
Enable_2
NC1
PE27
PC10
GND5
PC12
PC14
PC27
PC29
PC31
VDDIOP0_1
PA0
PA2
GND7
PA5
PA7
PA9
PA11
PA12
PA14
PA16
PA18
GND9
PA21
PA23
PA25
PA27
PA28
PA30
VDDANA_1
PD30
GND11
PD28
PD26
PD24
PD22
PD20
PD18
PD16
PD14
GND13
PD12
PD10
PD8
PD6
PD5
PD3
PD1
VDDIOP1_1
GND15
PB10
PB14
PB19
PB21
PB23
PB24
GND17
USBA_DP
USBA_DM
GND18
USBB_DP
USBB_DM
GND19
USBC_DP
USBC_DM
GND_ETH1
ETH0_TX1+
ETH0_TX1ETH0_RX1+
ETH0_RX1GND_ETH2
ETH0_TX2+
ETH0_TX2ETH0_RX2+
ETH0_RX2GND23
LED2
LED1
VCC_3V3_2
VCC_3V3_4
Enable_3
ADVREF
PE28
PC11
PC13
PC15
PC26
PC28
GND6
PC30
VDDIOP0_2
PA1
PA3
PA4
PA6
PA8
PA10
GND8
PA13
PA15
PA17
PA19
PA20
PA22
PA24
PA26
GND10
PA29
PA31
VDDANA_2
PD31
PD29
PD27
PD25
PD23
GND12
PD21
PD19
PD17
PD15
PD13
PD11
PD9
PD7
GND14
PD4
PD2
PD0
VDDIOP1_2
PB13
PB12
PB15
PB20
PB22
GND16
PB25
PB27
PB29
PB31
PB30
PB26
PB28
GND20
DIBP
DIBN
GND22
JTAGSEL
WKUP
SHDN
BMS
nRST
nTRST
TDI
TCK
TMS
TDO
RTCK
GND24
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
C30
10uF
PE28
PC11
PC13
PC15
PC26
PC28
PE[23..31]
PE23
PE24
PE25
PE26
PE27
PE28
PE29
PE30
PE31
ADVREF
C127
1uF
PC30
VDDIOP0_SOD
PA1
PA3
PA4
PA6
PA8
PA10
C
PA13
PA15
PA17
PA19
PA20
PA22
PA24
PA26
PA29
PA31
PD[0..31]
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
PD8
PD9
PD10
PD11
PD12
PD13
PD14
PD15
PD16
PD17
PD18
PD19
PD20
PD21
PD22
PD23
PD24
PD25
PD26
PD27
PD28
PD29
PD30
PD31
VDDANA
PD31
PD29
PD27
PD25
PD23
C28
1uF
PD21
PD19
PD17
PD15
PD13
PD11
PD9
PD7
PD4
PD2
PD0
VDDIOP1_SOD
R81
PB15
PB20
PB22
R80
27R DNP
0R
PB13
PB12
PB25
PB27
PB29
PB31
PB30
PB26
PB28
B
DIBP
DIBN
JTAGSEL
WKUP_SOD
SHDN
BMS
NRST_SOD
NTRST
TDI
TCK
TMS
TDO
A
C
B
A
REV
SODIMM_2
SAMA5D36-CMP
JH
JH
JH
MODIF.
SCALE
DES.
21-Jan-14
X.X
27-Sep-13 X.X
18-Jun-13 X.X
DATE
1/1
200-PIN SODIMM
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
5
4
3
2
1
XX-XXX-XX
XX-XXX-XX
XX-XXX-XX
VER.
DATE
REV.
SHEET
C
10
10
6.
Revision History
Table 6-1.
Deisgn Optimization for Low-Power SAMA5D3-based Systems App Note Rev. 11291A Revision History
Doc. Rev.
11291A
Changes
23-Jun-14
First issue
Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]
Atmel-11291A-ATARM-Low-Power-Design-for-SAMA5D3-based-Systems-Application-Note_23-Jun-14
29
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