A Compression-based Morphable PCM Architecture for Improving

A Compression-based Morphable
PCM Architecture for Improving
Resistance Drift Tolerance
and
HPCAN Lab, Computer Engineering Department,
Sharif University of Technology ,
Tehran, Iran
ASAP2014, 18-20 June 2014, IBM-Zurich.
ASAP’14
Computer Engineering Department
Sharif University of Tech.
Phase Change Memory
More cores in system  More concurrency  Larger working set
 Larger memory
DRAM-based memory system hitting: power, cost, scaling wall
Phase Change Memory (PCM): Emerging technology,
more scalable, denser, more power-efficient
Chalcogenide glass
Ge2Sb2Te5 (GST)
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Computer Engineering Department
Sharif University of Tech.
Phase Change Memory
PCM can be:
- Single-Level Cell (SLC)
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Computer Engineering Department
Sharif University of Tech.
Phase Change Memory
PCM can be:
- Single-Level Cell (SLC)
- Multi-level Cell (MLC)
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Computer Engineering Department
Sharif University of Tech.
Phase Change Memory
PCM can be:
- Single-Level Cell (SLC)
- Multi-level Cell (MLC)
• Read
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Computer Engineering Department
Sharif University of Tech.
Phase Change Memory
PCM can be:
- Single-Level Cell (SLC)
- Multi-level Cell (MLC)
• Read
• Write
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Computer Engineering Department
Sharif University of Tech.
Problem Overview
• Designing a MLC PCM has a serious challenge:
A PCM-dedicated sort of soft error appears
in the MLC PCM
• Resistance drift
• MLC PCM has
• More storage capacity
• Higher rate of soft error
Building a Reliable MLC PCM
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Computer Engineering Department
Sharif University of Tech.
A Deeper Look at Resistance Drift
What is resistance drift?
❖Resistance value of the cell increases over time!
Content of the cell
“01”
“00”
❖Why ? Due to structural relaxation of GST.
❖How? There is an accurate and prototype-justified
model.
R0 = initial resistance
t = elapsed time
d = drift exponent
t0 = normalized time constant
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Computer Engineering Department
Sharif University of Tech.
Probability of Soft Error
“11” and “00” are resistance drift resilient states.
“10” and “01” are resistance drift prone patterns.
❖For t=16 seconds:
<10E-16 (too small)
7.5E-4
2.8E-1
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Computer Engineering Department
Sharif University of Tech.
Key Insights
• 2 states are drift immune and 2 states are drift
prone
• Compressing a block makes some cells free
Why not using the freed cells to
prepare a reliable back-up for a
compressed block?
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Computer Engineering Department
Sharif University of Tech.
Drift-resilient Block Formation
Based on block compression ratio we have introduced
3 formats which are
- Resistance drift resilient, and
- Frequently appear in memory blocks
The 3 formats are:
❖SLC (fully protected)
❖MLC-f (fully protected)
❖MLC-p (partially protected)
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Sharif University of Tech.
Drift-resilient Block Formation
3 formats:
We will see formation examples later
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Computer Engineering Department
Sharif University of Tech.
Frequency of Formats
For two state-of-the-art compression algorithms (FPC, BDI):
~ 70%
First bar:
FPC (Frequent Pattern Compression|)
Second bar: BDI (Base-Delta-Immediate)
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Computer Engineering Department
Sharif University of Tech.
Examples
MLC-p is not error-free
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Computer Engineering Department
Sharif University of Tech.
MLC-p is not error-free
When t is large
This error appears because of level-2  level-4
transitions: very rare error but exists!
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Computer Engineering Department
Sharif University of Tech.
Proposed Architecture
SLC, MLC-p or
MLC-f?
See the paper for error
management unit
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Computer Engineering Department
Sharif University of Tech.
Evaluation
Bit Error Rate:
❖Full-system simulation is time-consuming
 we set up a Monte Carlo experiment
❖10M cache line samples of different workloads
from full-system simulations
❖With following resistance drift parameter:
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Sharif University of Tech.
Bit Error Rate
10%
10X
Better compression ratio better BER
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Computer Engineering Department
Sharif University of Tech.
Performance and Energy
Full-system simulation based on Gem5
Overhead (TSMC 45nm library)
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Sharif University of Tech.
Workloads
PARSEC suite
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Computer Engineering Department
Sharif University of Tech.
Performance
Instruction Per Cycle (IPC)
~21%
Since a large fraction of memory accesses are compressed in
SLC format which is fast for read/write
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Computer Engineering Department
Sharif University of Tech.
Energy
Total energy of the MLC PCM memory system
8%
Since a large fraction of memory accesses are compressed in SLC format
which is fast and consumes lower power for read/write
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Computer Engineering Department
Sharif University of Tech.
Summary
• Resistance drift problem in MLC PCM
❖Drift prone patterns v.s. Drift immune patterns
❖We introduced 3 drift resilient formats for
compressed blocks
• We provided an architectural support
• Evaluation showed that
❖BER is reduced
❖Performance/Energy is slightly improved
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Sharif University of Tech.
Thank you!
QUESTIONS?
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Sharif University of Tech.
Error management algorithm
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Sharif University of Tech.
Mismatch detection algorithm
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Computer Engineering Department
Sharif University of Tech.